公开(公告)号：US5057445A

公开(公告)日：1991-10-15

申请号：US639767

申请日：1991-01-11

申请人： Ching F. Yeh ,  Yuji Yatsuda

发明人： Ching F. Yeh ,  Yuji Yatsuda

IPC分类号： H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/78

CPC分类号： H01L29/0847 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/7835

摘要： In a semiconductor device comprising a plurality of planar high-voltage insulated-gate field-effect transistors in which offset regions are provided in portions of the semiconductor substrate near the junctions of the adjacent drain regions and near the substrate surface, low impurity concentration offset regions are formed in the semiconductor substrate in such a manner that each low impurity concentration offset region is coupled the source region and is located between the drain regions of the field-effect transistors adjacent to each other and near the semiconductor surface, whereby reduction of the "on resistance" is achieved without affecting the FET sustaining voltage.