公开(公告)号：US07873810B2

公开(公告)日：2011-01-18

申请号：US10956498

申请日：2004-10-01

申请人： Darren M. Jones ,  Ryan C. Kinter ,  Radhika Thekkath ,  Chinh Nguyen Tran

发明人： Darren M. Jones ,  Ryan C. Kinter ,  Radhika Thekkath ,  Chinh Nguyen Tran

IPC分类号： G06F12/00 ,  G06F9/26 ,  G06F9/34 ,  G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44

CPC分类号： G06F9/3001 ,  G06F9/30181 ,  G06F9/3552

摘要： A modular subtraction instruction for execution on a microprocessor having at least one register. The instruction includes opcode bits for designating the instruction and operand bits for designating at least one register storing an offset index, a decrement value, and an address index. When the modular subtraction instruction is executed on the microprocessor, the address index is modified by the decrement value if the address index is not zero and is modified by the offset index if the address index is zero. For example, the address index is repeatedly decremented using the decrement value until it reaches zero, and then the address index is reset back to the offset index. The operand bits may include multiple fields identifying multiple registers selected from the general purpose registers of the microprocessor. The modular subtraction instruction enables access to a buffer in memory in circular fashion by virtue of its operation.

摘要翻译： 一种用于在具有至少一个寄存器的微处理器上执行的模块化减法指令。 该指令包括用于指定指令的操作码位和用于指定存储偏移索引，递减值和地址索引的至少一个寄存器的操作数位。 当在微处理器上执行模块化减法指令时，如果地址索引不为零，则地址索引将通过递减值进行修改，如果地址索引为零，则由偏移索引进行修改。 例如，地址索引使用递减值重复递减，直到它达到零，然后将地址索引重置回到偏移索引。 操作数位可以包括标识从微处理器的通用寄存器中选择的多个寄存器的多个字段。 模块化减法指令通过其操作使得能够以循环方式访问存储器中的缓冲器。