公开(公告)号：US06362045B1

公开(公告)日：2002-03-26

申请号：US09567419

申请日：2000-05-09

申请人： Yung-Tao Lin ,  Chwa Siow Lee ,  Chiew Sin Ping

发明人： Yung-Tao Lin ,  Chwa Siow Lee ,  Chiew Sin Ping

IPC分类号： H01L21336

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L29/42324 ,  H01L29/511

摘要： A new method of forming non-volatile memory cells with an improved bottom silicon dioxide layer of the O—N—O has been achieved. A semiconductor substrate is provided. A tunneling dielectric layer is grown overlying the semiconductor substrate. A polysilicon layer is deposited overlying the tunneling dielectric layer. Nitrogen is implanted into the polysilicon layer to form a nitridized surface region. The polysilicon layer and the tunneling dielectric layer are then patterned to form floating gates. A bottom silicon dioxide layer is grown overlying the floating gates by thermal oxidation of the polysilicon layer. The nitridized surface region reduces the rate of thermal oxidation and creates a smooth surface. A silicon nitride layer is deposited overlying the bottom silicon dioxide layer. A top silicon dioxide layer is formed overlying the silicon nitride layer to complete the O—N—O stack. A conductive layer, that may comprise polysilicon, is deposited overlying the top silicon dioxide layer. The conductive layer, the top silicon dioxide layer, the silicon nitride layer, and the bottom silicon dioxide layer are patterned to form control gates and to complete the non-volatile memory cells.

摘要翻译： 已经实现了用O-N-O改进的底部二氧化硅层形成非易失性存储单元的新方法。 提供半导体衬底。 生长在半导体衬底上的隧道介电层。 沉积覆盖隧道介电层的多晶硅层。 将氮注入到多晶硅层中以形成氮化表面区域。 然后将多晶硅层和隧道介电层图案化以形成浮栅。 通过多晶硅层的热氧化生长覆盖浮栅的底部二氧化硅层。 氮化表面区域降低热氧化速率并产生光滑表面。 沉积在底部二氧化硅层上的氮化硅层。 形成覆盖氮化硅层的顶部二氧化硅层以完成O-N-O堆叠。 可以包括多晶硅的导电层覆盖在顶部二氧化硅层上。 将导电层，顶部二氧化硅层，氮化硅层和底部二氧化硅层图案化以形成控制栅极并完成非易失性存储单元。