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    Electronic device parameter estimator and method therefor
    1.
    发明授权
    Electronic device parameter estimator and method therefor 失效
    电子设备参数估计及其方法

    公开(公告)号：US06405349B1

    公开(公告)日：2002-06-11

    申请号：US09580291

    申请日：2000-05-26

    申请人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    发明人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    IPC分类号： G06F1750

    CPC分类号： G06F17/5022 ,  G06F2217/78

    摘要： A process (20) and design tool (62) are presented for the accurate prediction of design parameters (42) for components (38) of an integrated circuit (22) during the early stages of the design of that integrated circuit (22). These predicted design parameters (42) include pin count parameters (50), propagation delay parameters (52), layout area parameters (54), dynamic power parameters (56), static power parameters (58), and total power parameters (60). With these parameters, the designer interactively modifies the design prior to the layout and prototyping of the integrated circuit (22). The dynamic power parameters (56) and total power parameters (60) may be repetitively predicted with differing input items to establish a power usage pattern for the integrated circuit (22).

    摘要翻译： 提出了一种工艺（20）和设计工具（62），用于在该集成电路（22）的设计的早期阶段期间精确地预测集成电路（22）的部件（38）的设计参数（42）。 这些预测设计参数（42）包括引脚数参数（50），传播延迟参数（52），布局面积参数（54），动态功率参数（56），静态功率参数（58）和总功率参数（60） 。 利用这些参数，设计者在集成电路（22）的布局和原型之前交互地修改设计。 动态功率参数（56）和总功率参数（60）可以用不同的输入项重复预测，以建立集成电路（22）的功率使用模式。

    Electronic device parameter estimator and method therefor
    2.
    发明授权
    Electronic device parameter estimator and method therefor 失效

    公开(公告)号：US6090151A

    公开(公告)日：2000-07-18

    申请号：US886745

    申请日：1997-07-01

    申请人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    发明人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5022 ,  G06F2217/78

    摘要： A process (20) and design tool (62) are presented for the accurate prediction of design parameters (42) for components (38) of an integrated circuit (22) during the early stages of the design of that integrated circuit (22). These predicted design parameters (42) include pin count parameters (50), propagation delay parameters (52), layout area parameters (54), dynamic power parameters (56), static power parameters (58), and total power parameters (60). With these parameters, the designer interactively modifies the design prior to the layout and prototyping of the integrated circuit (22). The dynamic power parameters (56) and total power parameters (60) may be repetitively predicted with differing input items to establish a power usage pattern for the integrated circuit (22).

    Processor power consumption estimator that using instruction and action formulas which having average static and dynamic power coefficients
    3.
    发明授权
    Processor power consumption estimator that using instruction and action formulas which having average static and dynamic power coefficients 失效
    使用具有平均静态和动态功率系数的指令和动作公式的处理器功耗估计器

    公开(公告)号：US6002878A

    公开(公告)日：1999-12-14

    申请号：US886505

    申请日：1997-07-01

    申请人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    发明人： John B. Gehman ,  Kerry Lucille Johns-Vano ,  Colleen Kane Steward

    IPC分类号： G01R31/30 ,  G06F11/24 ,  G06F11/267 ,  G01R19/00

    CPC分类号： G06F11/2236 ,  G01R31/3004 ,  G06F11/24 ,  G06F2217/68 ,  G06F2217/78

    摘要： A process (20) is presented for determining the total routine energy (78) consumed by a processor (22) during the execution of a code routine (36). This total routine energy (78) is computed by determining the operation energy (76) consumed in the execution of each operating instruction (38) within the code routine (36). The operation energy (76) for each operating instruction (38) is computed by determining the average operation power (74) consumed during the execution of the operating instruction (38). The average operation power (74) for each operating instruction (38) is determined by determining an instruction power (90) and a summed-action power (92) for that operating instruction (38). The summed-action power (92) is the sum of action powers (96) computed through the use of an action formula (100) for each internal action (88) performed by the processor (22) in response to the operating instruction (38).

    摘要翻译： 呈现用于确定在执行代码例程（36）期间由处理器（22）消耗的总例程能量（78）的过程（20）。 通过确定代码程序（36）内的每个操作指令（38）的执行中消耗的操作能量（76）来计算总的常规能量（78）。 通过确定在执行操作指令（38）期间消耗的平均操作功率（74）来计算每个操作指令（38）的操作能量（76）。 通过确定用于该操作指令（38）的指令功率（90）和求和功率（92）来确定每个操作指令（38）的平均操作功率（74）。 总和动力（92）是通过对处理器（22）响应于操作指令（38）执行的每个内部动作（88）使用动作公式（100）而计算出的动作力（96）的总和 ）。