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公开(公告)号：US20130339671A1
公开(公告)日：2013-12-19
申请号：US13517865
申请日：2012-06-14
CPC分类号： G06F9/30043 , G06F9/30181 , G06F9/3826 , G06F9/3834 , G06F9/3838 , G06F9/384
摘要： A system and method for reducing the latency of load operations. A register rename unit within a processor determines whether a decoded load instruction is eligible for conversion to a zero-cycle load operation. If so, control logic assigns a physical register identifier associated with a source operand of an older dependent store instruction to the destination operand of the load instruction. Additionally, the register rename unit marks the load instruction to prevent it from reading data associated with the source operand of the store instruction from memory. Due to the duplicate renaming, this data may be forwarded from a physical register file to instructions that are younger and dependent on the load instruction.
摘要翻译： 一种用于减少加载操作延迟的系统和方法。 处理器内的寄存器重命名单元确定解码的加载指令是否符合转换为零周期加载操作的资格。 如果是这样，则控制逻辑将与旧的从属存储指令的源操作数相关联的物理寄存器标识分配给加载指令的目的地操作数。 此外，寄存器重命名单元标记加载指令以防止其从存储器读取与存储指令的源操作数相关联的数据。 由于重复重命名，该数据可能会从物理寄存器文件转发到更年轻且取决于加载指令的指令。
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公开(公告)号：US09996348B2
公开(公告)日：2018-06-12
申请号：US13517865
申请日：2012-06-14
CPC分类号： G06F9/30043 , G06F9/30181 , G06F9/3826 , G06F9/3834 , G06F9/3838 , G06F9/384
摘要： A system and method for reducing the latency of load operations. A register rename unit within a processor determines whether a decoded load instruction is eligible for conversion to a zero-cycle load operation. If so, control logic assigns a physical register identifier associated with a source operand of an older dependent store instruction to the destination operand of the load instruction. Additionally, the register rename unit marks the load instruction to prevent it from reading data associated with the source operand of the store instruction from memory. Due to the duplicate renaming, this data may be forwarded from a physical register file to instructions that are younger and dependent on the load instruction.
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