公开(公告)号：US08035426B1

公开(公告)日：2011-10-11

申请号：US12206485

申请日：2008-09-08

申请人： Reuven Ecker ,  Dan Lieberman

发明人： Reuven Ecker ,  Dan Lieberman

IPC分类号： H03L7/00

CPC分类号： H03K17/223

摘要： This application discloses a device that has a power-on reset generator. The power-on reset generator can include a power-on detector that receives an input electrical signal and outputs a digital signal that has predetermined value when the voltage of the input electrical signal exceeds a threshold voltage. The power-on detector can include multiple voltage-shaping elements arranged in series. Each voltage-shaping element can have a P-channel transistor and an N-channel transistor that differs in strength with respect to the P-channel transistor. The power-on detector can also include a switch that locks the digital signal at the predetermined value when the voltage of the input electrical signal exceeds the voltage threshold. In addition to the power-on detector, the power-on reset generator can include a digital delay that receives both the digital signal and a clock signal. The power-on reset generator can wait a predetermined time delay after the digital signal reaches the predetermined value then de-assert the reset signal.

摘要翻译： 本申请公开了一种具有上电复位发生器的装置。 上电复位发生器可以包括接通输入电信号的电源检测器，并且当输入电信号的电压超过阈值电压时输出具有预定值的数字信号。 上电检测器可以包括串联布置的多个电压整形元件。 每个电压整形元件可以具有相对于P沟道晶体管的强度不同的P沟道晶体管和N沟道晶体管。 上电检测器还可以包括当输入电信号的电压超过电压阈值时将数字信号锁定在预定值的开关。 除了上电检测器之外，上电复位发生器可以包括接收数字信号和时钟信号的数字延迟。 上电复位发生器可以在数字信号达到预定值之后等待预定的时间延迟，然后解除重置信号。

公开(公告)号：US07525341B1

公开(公告)日：2009-04-28

申请号：US11093080

申请日：2005-03-28

申请人： Eitan Rosen ,  Dan Lieberman

发明人： Eitan Rosen ,  Dan Lieberman

IPC分类号： H03K19/173 ,  H03K3/37 ,  G06F7/38

CPC分类号： H03K19/00323 ,  H03K17/005

摘要： Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly. The timing of relatively slow transitions is left unaltered. The invention advantageously allows all selector input transitions to yield a data output transition with a substantially constant delay.

摘要翻译： 提供了多路复用器电路的时间平衡切换的方法和装置。 本发明的实施例包括耦合到多路复用器电路的输出的晶体管链。 晶体管链优选地延迟否则将相对快速地发生的转变，以匹配相对缓慢地发生的转变的定时。 相对较慢的转换的时间保持不变。 本发明有利地允许所有选择器输入转换以基本恒定的延迟产生数据输出转换。

公开(公告)号：US20090179686A1

公开(公告)日：2009-07-16

申请号：US12405610

申请日：2009-03-17

申请人： Eitan Rosen ,  Dan Lieberman

发明人： Eitan Rosen ,  Dan Lieberman

IPC分类号： H03K17/00

CPC分类号： H03K19/00323 ,  H03K17/005

摘要： Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly. The timing of relatively slow transitions is left unaltered. The invention advantageously allows all selector input transitions to yield a data output transition with a substantially constant delay.

摘要翻译： 提供了多路复用器电路的时间平衡切换的方法和装置。 本发明的实施例包括耦合到多路复用器电路的输出的晶体管链。 晶体管链优选地延迟否则将相对快速地发生的转变，以匹配相对缓慢地发生的转变的定时。 相对较慢的转换的时间保持不变。 本发明有利地允许所有选择器输入转换以基本恒定的延迟产生数据输出转换。

公开(公告)号：US20200279270A1

公开(公告)日：2020-09-03

申请号：US16289151

申请日：2019-02-28

申请人： Dan Lieberman ,  Jeffrey Lynn Hagins

发明人： Dan Lieberman ,  Jeffrey Lynn Hagins

IPC分类号： G06Q20/40 ,  G06Q20/38 ,  H04L9/32 ,  H04L9/08 ,  G06K9/00

摘要： Disclosed are systems, methods, and non-transitory computer-readable media for authorizing transactions based on a private key stored in secure hardware on an authorized client device. An authorization system receives an external authorization request identifying a user account and a requested action. The authorization system transmits, to a client device associated with the user account, an internal authorization request that causes the client device to present a prompt to authorize the requested action. The authorization system receives an internal authorization message indicating that the requested action has been authorized. The internal authorization message includes a digital signature that was generated by the client device using a private key stored in a secure hardware of the client device. The authorization system verifies the digital signature using a public key associated with the user account and transmits an external authorization message to the remote server authorizing execution of the requested action.

公开(公告)号：US07948268B2

公开(公告)日：2011-05-24

申请号：US12882832

申请日：2010-09-15

申请人： Eitan Rosen ,  Dan Lieberman

发明人： Eitan Rosen ,  Dan Lieberman

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/00323 ,  H03K17/005

摘要： Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly. The timing of relatively slow transitions is left unaltered. The invention advantageously allows all selector input transitions to yield a data output transition with a substantially constant delay.

摘要翻译： 提供了多路复用器电路的时间平衡切换的方法和装置。 本发明的实施例包括耦合到多路复用器电路的输出的晶体管链。 晶体管链优选地延迟否则将相对快速地发生的转变，以匹配相对缓慢地发生的转变的定时。 相对较慢的转换的时间保持不变。 本发明有利地允许所有选择器输入转换以基本恒定的延迟产生数据输出转换。

公开(公告)号：US07808271B2

公开(公告)日：2010-10-05

申请号：US12405610

申请日：2009-03-17

申请人： Eitan Rosen ,  Dan Lieberman

发明人： Eitan Rosen ,  Dan Lieberman

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/00323 ,  H03K17/005

摘要： Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly. The timing of relatively slow transitions is left unaltered. The invention advantageously allows all selector input transitions to yield a data output transition with a substantially constant delay.

摘要翻译： 提供了多路复用器电路的时间平衡切换的方法和装置。 本发明的实施例包括耦合到多路复用器电路的输出的晶体管链。 晶体管链优选地延迟否则将相对快速地发生的转变，以匹配相对缓慢地发生的转变的定时。 相对较慢的转换的时间保持不变。 本发明有利地允许所有选择器输入转换以基本恒定的延迟产生数据输出转换。

公开(公告)号：US20110002417A1

公开(公告)日：2011-01-06

申请号：US12882832

申请日：2010-09-15

申请人： Eitan Rosen ,  Dan Lieberman

发明人： Eitan Rosen ,  Dan Lieberman

IPC分类号： H04L27/00

CPC分类号： H03K19/00323 ,  H03K17/005

摘要： Methods and apparatus are provided for time-balanced switching of multiplexer circuits. An embodiment of the invention includes a transistor chain coupled to the output of the multiplexer circuit. The transistor chain preferably delays transitions that would otherwise occur relatively quickly, to match the timing of transitions that occur relatively slowly. The timing of relatively slow transitions is left unaltered. The invention advantageously allows all selector input transitions to yield a data output transition with a substantially constant delay.

摘要翻译： 提供了多路复用器电路的时间平衡切换的方法和装置。 本发明的实施例包括耦合到多路复用器电路的输出的晶体管链。 晶体管链优选地延迟否则将相对快速地发生的转变，以匹配相对缓慢地发生的转变的定时。 相对较慢的转换的时间保持不变。 本发明有利地允许所有选择器输入转换以基本恒定的延迟产生数据输出转换。