公开(公告)号：US5371706A

公开(公告)日：1994-12-06

申请号：US932462

申请日：1992-08-20

申请人： Steven V. Krentz ,  David A. Tatman

发明人： Steven V. Krentz ,  David A. Tatman

IPC分类号： G11C16/34 ,  G11C7/00

CPC分类号： G11C16/345 ,  G11C16/344

摘要： The circuit and method of this invention provide for rapid and reliable detection of depleted or nearly-depleted cells in a column. The circuit is formed on the substrate of a nonvolatile, integrated-circuit memory including rows and columns of memory cells. The drain of each memory cell is connected to a drain-column line and the control gate that is connected to a wordline. One input of a sense amplifier is connected to the drain-column line. The other input of the sense amplifier is connected to a current reference formed on said substrate. The wordline is connected to a wordline test voltage and the output of the sense amplifier is coupled to an output pin of the integrated circuit. The current through the drain-column line is compared with the current through the current reference and, if the current through the drain-column line is sufficiently close to the current through said current reference, a signal is transmitted to an output pin of the integrated circuit.

摘要翻译： 本发明的电路和方法提供了对柱中耗尽或几乎耗尽的细胞的快速和可靠的检测。 电路形成在包括行和列的存储器单元的非易失性集成电路存储器的基板上。 每个存储单元的漏极连接到漏极 - 列线路，并连接到字线的控制栅极。 读出放大器的一个输入端连接到漏 - 列线。 读出放大器的另一个输入端与形成在所述衬底上的电流基准相连。 字线连接到字线测试电压，读出放大器的输出耦合到集成电路的输出引脚。 将通过漏极 - 列线路的电流与通过电流基准的电流进行比较，并且如果通过漏 - 列线路的电流足够接近通过所述电流基准的电流，则信号被发送到集成的 电路。