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    TECHNOLOGIES FOR DYNAMIC WORK QUEUE MANAGEMENT
    1.
    发明申请
    TECHNOLOGIES FOR DYNAMIC WORK QUEUE MANAGEMENT 审中-公开

    公开(公告)号：US20170289242A1

    公开(公告)日：2017-10-05

    申请号：US15087536

    申请日：2016-03-31

    申请人： David Keppel ,  Ulf R. Hanebutte ,  Mario Flajslik ,  James Dinan

    发明人： David Keppel ,  Ulf R. Hanebutte ,  Mario Flajslik ,  James Dinan

    IPC分类号： H04L29/08

    CPC分类号： H04L67/1008

    摘要： Technologies for dynamic work queue management include a producer computing device communicatively coupled to a consumer computing device. The consumer computing device is configured to transmit a pop request (e.g., a one-sided pull request) that includes consumption constraints indicating an amount of work (e.g., a range of acceptable fraction of work elements to return from a work queue of the producer computing device) to pull from the producer computing device. The producer computing device is configured to determine whether the pop request can be satisfied and generate a response that includes an indication of the result of the determination and one or more producer metrics usable by the consumer computing device to determine a subsequent action to be performed by the consumer computing device upon receipt of the response message. Other embodiments are described and claimed herein.

    Method for integration of interpretation and translation in a microprocessor
    3.
    发明授权
    Method for integration of interpretation and translation in a microprocessor 有权
    在微处理器中整合解释和翻译的方法

    公开(公告)号：US08418153B2

    公开(公告)日：2013-04-09

    申请号：US12578500

    申请日：2009-10-13

    申请人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    发明人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    IPC分类号： G06F9/455 ,  G06F9/46

    CPC分类号： G06F9/3017 ,  G06F9/3861 ,  G06F9/45516

    摘要： A method for executing a target application on a host processor including the steps of translating each target instruction being to be executed into host instructions, storing the translated host instructions, executing the translated host instructions, responding to an exception during execution of a translated instruction by rolling back to a point in execution at which correct state of a target processor is known, and interpreting each target instruction in order from the point in execution at which correct state of a target processor is known.

    摘要翻译： 一种用于在主处理器上执行目标应用程序的方法，包括以下步骤：将要执行的每个目标指令转换成主机指令，存储所翻译的主机指令，执行转换的主机指令，在执行翻译指令期间响应异常 回滚到目标处理器的正确状态已知的执行点，并且从目标处理器的正确状态已知的执行点起按顺序解释每个目标指令。

    METHOD FOR INTEGRATION OF INTERPRETATION AND TRANSLATION IN A MICROPROCESSOR
    4.
    发明申请
    METHOD FOR INTEGRATION OF INTERPRETATION AND TRANSLATION IN A MICROPROCESSOR 有权
    在微处理器中整合解释和翻译的方法

    公开(公告)号：US20100262955A1

    公开(公告)日：2010-10-14

    申请号：US12578500

    申请日：2009-10-13

    申请人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    发明人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    IPC分类号： G06F9/455 ,  G06F9/45

    CPC分类号： G06F9/3017 ,  G06F9/3861 ,  G06F9/45516

    摘要： A method for executing a target application on a host processor including the steps of translating each target instruction being to be executed into host instructions, storing the translated host instructions, executing the translated host instructions, responding to an exception during execution of a translated instruction by rolling back to a point in execution at which correct state of a target processor is known, and interpreting each target instruction in order from the point in execution at which correct state of a target processor is known.

    摘要翻译： 一种用于在主处理器上执行目标应用程序的方法，包括以下步骤：将要执行的每个目标指令转换成主机指令，存储所翻译的主机指令，执行转换的主机指令，在执行翻译指令期间响应异常 回滚到目标处理器的正确状态已知的执行点，并且从目标处理器的正确状态已知的执行点起按顺序解释每个目标指令。

    Method and apparatus for maintaining context while executing translated instructions
    5.
    发明授权
    Method and apparatus for maintaining context while executing translated instructions 有权
    在执行转换的指令的同时维护上下文的方法和装置

    公开(公告)号：US06415379B1

    公开(公告)日：2002-07-02

    申请号：US09417981

    申请日：1999-10-13

    申请人： David Keppel ,  Robert Cmelik ,  Robert Bedichek

    发明人： David Keppel ,  Robert Cmelik ,  Robert Bedichek

    IPC分类号： G06F9455

    CPC分类号： G06F9/45504

    摘要： A method of maintaining translation context for instructions translated from instructions designed for a target microprocessor to run on a host microprocessor including storing translation context related to each translated host instruction, indicating a translation context for host instructions presently being executed by the host processor, comparing translation context stored for a next host instruction with the translation context for a host instruction presently being executed, executing the next host instruction if the translation context of the next host instruction and the presently executing host instruction compare, and searching for an instruction with translation context which compares to the translation context of the host instruction presently executing if the translation context of the next host instruction and the presently executing host instruction do not compare.

    摘要翻译： 一种维护用于由目标微处理器设计的指令在主机微处理器上运行的指令的转换上下文的方法，包括存储与每个转换的主机指令相关的转换上下文，指示当前由主处理器执行的主机指令的转换上下文， 如果当前正在执行的主机指令的翻译上下文存储下一个主机指令的上下文，则如果下一个主机指令和当前执行的主机指令的转换上下文相比较，则执行下一个主机指令，并且搜索具有翻译上下文的指令 如果下一个主机指令和当前执行的主机指令的转换上下文不进行比较，则与当前执行的主机指令的转换上下文进行比较。

    Fine grain translation discrimination
    6.
    发明授权
    Fine grain translation discrimination 有权
    细粮翻译歧视

    公开(公告)号：US06363336B1

    公开(公告)日：2002-03-26

    申请号：US09417356

    申请日：1999-10-13

    申请人： John Banning ,  H. Peter Anvin ,  Benjamin Gribstad ,  David Keppel ,  Alex Klaiber ,  Paul Serris

    发明人： John Banning ,  H. Peter Anvin ,  Benjamin Gribstad ,  David Keppel ,  Alex Klaiber ,  Paul Serris

    IPC分类号： G06F900

    CPC分类号： G06F9/3812 ,  G06F9/3017 ,  G06F9/3808 ,  G06F9/45504 ,  G06F12/10

    摘要： A method for determining if writes to a memory page are directed to target instructions which have been translated to host instructions in a computer which translates instructions from a target instruction set to a host instruction set, including the steps of detecting a write to a memory page storing target instructions which have been translated to host instructions, detecting whether a sub-area of the memory page to which the write is addressed stores target instructions which have been translated, and invalidating host instructions translated from addressed target instructions.

    摘要翻译： 一种用于确定对存储器页面的写入是否被定向到已经被转换为将指令从目标指令集转换到主机指令集的计算机中的主机指令的目标指令的方法，包括以下步骤：检测对存储器页面的写入 将已经被转换为主机指令的目标指令存储在存储器页面中，检测写入的存储器页面的子区域是否存储已被翻译的目标指令，以及使从寻址的目标指令转换的主机指令无效。

    Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts
    10.
    发明授权
    Method for switching between interpretation and dynamic translation in a processor system based upon code sequence execution counts 有权
    基于代码序列执行计数在处理器系统中切换解释和动态转换的方法

    公开(公告)号：US07761857B1

    公开(公告)日：2010-07-20

    申请号：US09417332

    申请日：1999-10-13

    申请人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    发明人： Robert Bedichek ,  Linus Torvalds ,  David Keppel

    IPC分类号： G06F9/455

    CPC分类号： G06F9/3017 ,  G06F9/3861 ,  G06F9/45516

    摘要： A method for executing a target application on a host processor including the steps of translating each target instruction being to be executed into host instructions, storing the translated host instructions, executing the translated host instructions, responding to an exception during execution of a translated instruction by rolling back to a point in execution at which correct state of a target processor is known, and interpreting each target instruction in order from the point in execution at which correct state of a target processor is known.

    摘要翻译： 一种用于在主处理器上执行目标应用程序的方法，包括以下步骤：将要执行的每个目标指令转换成主机指令，存储所翻译的主机指令，执行转换的主机指令，在执行翻译指令期间响应异常 回滚到目标处理器的正确状态已知的执行点，并且从目标处理器的正确状态已知的执行点起按顺序解释每个目标指令。