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1.发明申请Alignment of variable length program instructions within a data processing apparatus 审中-公开可变长度程序指令在数据处理设备内的对准公开(公告)号：US20070079305A1
公开(公告)日：2007-04-05
申请号：US11523668
申请日：2006-09-20
申请人： Dirk Duerinckx
发明人： Dirk Duerinckx
IPC分类号： G06F9/45
CPC分类号： G06F9/3816 , G06F8/445 , G06F9/30149 , G06F9/3853 , G06F9/3885
摘要： A compiler is provided for compiling program instructions in dependence upon a predetermined decoder input instruction alignment. The compiler comprises a program instruction sequence generator operable to process source code to produce a sequence comprising a plurality of program instructions for input to a decoder. At least one program instruction is reordered within a storage region of program memory. The storage region has an associated memory address and an offset value. The offset value gives a starting location of said program instruction within the memory address. The reordering of the program instruction is such that manipulations of instruction units of the plurality of program instructions required to achieve the predetermined decoder input instruction alignment are less complex than manipulations that would be required if no reordering had been performed. According to a further aspect, a program instruction aligner is provided to shift at least one portion of the reordered (reformatted) program instruction to produce the predetermined decoder-input instruction alignment. The offset value and an instruction length are supplied as control inputs to the program instruction aligner. A plurality of connections between register fields and shifter fields of the program instruction aligner is such that at least one of said plurality of register fields is connected to only a subset of said plurality of shifter fields.
摘要翻译： 提供编译器，用于根据预定的解码器输入指令对准来编译程序指令。 编译器包括程序指令序列发生器，其可操作以处理源代码以产生包括用于输入到解码器的多个程序指令的序列。 在程序存储器的存储区域内重新排列至少一个程序指令。 存储区域具有关联的存储器地址和偏移值。 偏移值给出存储器地址内的所述程序指令的起始位置。 程序指令的重新排序使得实现预定解码器输入指令对准所需的多个程序指令的指令单元的操作比不执行重新排序所需要的操作更不复杂。 根据另一方面，提供了一种程序指令对准器来移位重排序（重新格式化）的程序指令的至少一部分，以产生预定的解码器输入指令对准。 补偿值和指令长度作为控制输入提供给程序指令对齐器。 程序指令对准器的寄存器字段和移位器字段之间的多个连接使得所述多个寄存器字段中的至少一个仅连接到所述多个移位器字段的子集。
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公开(公告)号：US20070079110A1
公开(公告)日：2007-04-05
申请号：US11240637
申请日：2005-10-03
IPC分类号： G06F9/40
CPC分类号： G06F9/3802
摘要： An interface operable to request instructions from a data store storing instructions of an application to be processed by a data processor, and operable to receive and transmit said instructions to said data processor, said interface comprising: an input operable to receive said instructions from said data store via at least one input bus; a buffer operable to store said received instructions; an output operable to output said instructions to said data processing apparatus via at least one output bus; a control signal input operable to receive a control signal; and a buffer controller operable to: control said buffer to request an instruction subsequent to a previously received instruction within an instruction stream of said application from said data store in response to detection of no control signal on said control signal input and to detection of available buffer storage capacity; and in response to a control signal received at said control signal input, said controller is operable to control at least one of input and storage of instructions within said interface in order to seek to reduce instruction movement through said input.
摘要翻译： 一种可操作以从存储由数据处理器处理的应用的指令的数据存储器请求指令的接口，并且可操作以从所述数据处理器接收和发送所述指令，所述接口包括：可操作以从所述数据接收所述指令的输入 通过至少一个输入总线存储; 缓冲器，用于存储所述接收到的指令; 输出，用于经由至少一个输出总线将所述指令输出到所述数据处理装置; 控制信号输入，用于接收控制信号; 以及缓冲器控制器，其可操作用于：响应于所述控制信号输入上没有控制信号的检测和所述控制信号输入的检测，控制所述缓冲器以从所述数据存储器请求在所述应用的指令流之内的先前接收到的指令之后的指令 存储容量; 并且响应于在所述控制信号输入处接收到的控制信号，所述控制器可操作以控制所述接口内的指令的输入和存储中的至少一个，以便寻求减少通过所述输入的指令移动。
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公开(公告)号：US20060271712A1
公开(公告)日：2006-11-30
申请号：US11403201
申请日：2006-04-13
IPC分类号： G06F13/28
CPC分类号： G06F9/4843 , G06F9/5016
摘要： A data processing apparatus and method of operation of such a data processing apparatus are disclosed. The data processing apparatus has a main processing unit operable to perform a plurality of data processing tasks, and a data engine for performing a number of those tasks on behalf of the main processing unit. At least one shared resource is allocatable to the data engine by the main processing unit for use by the data engine when performing data processing tasks on behalf of the main processing unit. The data engine comprises a data engine core for performing the tasks, and a data engine subsystem configurable by the main processing unit and arranged to manage communication between the data engine core and an allocated shared resource. The data engine core comprises a resource manager unit for acting as a master device with respect to the data engine subsystem in order to manage use of the allocated shared resource. It has been found that such an approach provides a particularly efficient implementation of a data engine within a data processing apparatus, which reduces the need for re-writing of existing code to enable it to be executed on such a data processing apparatus.
摘要翻译： 公开了这种数据处理装置的数据处理装置和操作方法。 数据处理装置具有可操作以执行多个数据处理任务的主处理单元，以及代表主处理单元执行多个任务的数据引擎。 至少一个共享资源可由主处理单元分配给数据引擎，供数据引擎在代表主处理单元执行数据处理任务时使用。 数据引擎包括用于执行任务的数据引擎核心以及由主处理单元配置并被配置为管理数据引擎核心和所分配的共享资源之间的通信的数据引擎子系统。 数据引擎核心包括用于充当相对于数据引擎子系统的主设备的资源管理器单元，以便管理所分配的共享资源的使用。 已经发现，这种方法提供了在数据处理装置内的数据引擎的特别有效的实施方式，这减少了对现有代码的重写的需要，以使其能够在这样的数据处理装置上执行。
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公开(公告)号：US07689735B2
公开(公告)日：2010-03-30
申请号：US11240637
申请日：2005-10-03
CPC分类号： G06F9/3802
摘要： An interface requests instructions from a data store storing instructions of an application to be processed by a data processor, and receives and transmits the instructions to the data processor. The interface includes: an input that receives the instructions from the data store via at least one input bus; a buffer that stores received instructions; an output that outputs instructions to the data processing apparatus via the output bus; a control signal input that receives a control signal; and a buffer controller that controls the buffer to request an instruction subsequent to a previously received instruction within an instruction stream of the application from the data store in response to detection of no control signal on the control signal input and to detection of available buffer storage capacity. In response to a control signal received at the control signal input, the controller controls at least one of input and storage of instructions within the interface in order to seek to reduce instruction movement through the input.
摘要翻译： 一个接口从存储由数据处理器处理的应用的指令的数据存储器请求指令，并且接收并发送指令给数据处理器。 接口包括：经由至少一个输入总线从数据存储器接收指令的输入; 存储接收到的指令的缓冲区; 经由输出总线向数据处理装置输出指令的输出; 接收控制信号的控制信号输入; 以及缓冲器控制器，其响应于在控制信号输入上没有控制信号的检测和控制信号输入的检测，控制缓冲器从数据存储器请求在应用的指令流之内的先前接收到的指令之后的指令， 。 响应于在控制信号输入处接收到的控制信号，控制器控制接口内的指令的输入和存储中的至少一个，以便寻求减少通过输入的指令移动。
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公开(公告)号：US07924858B2
公开(公告)日：2011-04-12
申请号：US11403201
申请日：2006-04-13
CPC分类号： G06F9/4843 , G06F9/5016
摘要： A data processing apparatus and method of operation of such a data processing apparatus are disclosed. The data processing apparatus has a main processing unit operable to perform a plurality of data processing tasks, and a data engine for performing a number of those tasks on behalf of the main processing unit. At least one shared resource is allocatable to the data engine by the main processing unit for use by the data engine when performing data processing tasks on behalf of the main processing unit. The data engine comprises a data engine core for performing the tasks, and a data engine subsystem configurable by the main processing unit and arranged to manage communication between the data engine core and an allocated shared resource. The data engine core comprises a resource manager unit for acting as a master device with respect to the data engine subsystem in order to manage use of the allocated shared resource. It has been found that such an approach provides a particularly efficient implementation of a data engine within a data processing apparatus, which reduces the need for re-writing of existing code to enable it to be executed on such a data processing apparatus.
摘要翻译： 公开了这种数据处理装置的数据处理装置和操作方法。 数据处理装置具有可操作以执行多个数据处理任务的主处理单元，以及代表主处理单元执行多个任务的数据引擎。 至少一个共享资源可由主处理单元分配给数据引擎，供数据引擎在代表主处理单元执行数据处理任务时使用。 数据引擎包括用于执行任务的数据引擎核心以及由主处理单元配置并被配置为管理数据引擎核心和所分配的共享资源之间的通信的数据引擎子系统。 数据引擎核心包括用于充当相对于数据引擎子系统的主设备的资源管理器单元，以便管理所分配的共享资源的使用。 已经发现，这种方法提供了在数据处理装置内的数据引擎的特别有效的实施方式，这减少了对现有代码的重写的需要，以使其能够在这样的数据处理装置上执行。
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