公开(公告)号：US20080070332A1

公开(公告)日：2008-03-20

申请号：US11856450

申请日：2007-09-17

Applicant: Woo-Sik CHO ,  Yun-Seok LEE ,  Dong-Won WOO ,  Ji-Hyeon SON

Inventor： Woo-Sik CHO ,  Yun-Seok LEE ,  Dong-Won WOO ,  Ji-Hyeon SON

IPC: H01L33/00

CPC classification number: G02F1/13394 ,  G02F2001/134318 ,  G02F2001/136236

Abstract: Disclosed is a method of fabricating a display substrate. A black matrix and a color filter layer are formed on a base substrate, and then a transparent electrode and a photoresist layer pattern are sequentially formed. The transparent electrode is patterned using the photoresist layer pattern as a mask to form a common electrode, and a spacer is formed using the photoresist layer pattern.

Abstract translation: 公开了一种制造显示基板的方法。 在基底基板上形成黑色矩阵和滤色器层，然后依次形成透明电极和光致抗蚀剂层图案。 使用光致抗蚀剂层图案作为掩模对透明电极进行图案化以形成公共电极，并且使用光致抗蚀剂层图案形成间隔物。

公开(公告)号：US08518731B2

公开(公告)日：2013-08-27

申请号：US13310005

申请日：2011-12-02

Applicant: Jeong Min Park ,  Dong-Won Woo ,  Je Hyeong Park ,  Sang Gab Kim ,  Jung-Soo Lee ,  Ji-Hyun Kim

Inventor： Jeong Min Park ,  Dong-Won Woo ,  Je Hyeong Park ,  Sang Gab Kim ,  Jung-Soo Lee ,  Ji-Hyun Kim

IPC: H01L21/00

CPC classification number: H01L29/786 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/78645

Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.

Abstract translation: 薄膜晶体管阵列板的制造方法包括：使用非过氧化物的蚀刻剂，在基板上同时形成栅极导体和第一电极; 在所述栅极导体和所述第一电极上形成栅极绝缘层; 在栅极绝缘层上形成半导体，源电极和漏电极; 在半导体，源电极和漏电极上形成钝化层; 以及在所述钝化层上形成第二电极层。

公开(公告)号：US20120273787A1

公开(公告)日：2012-11-01

申请号：US13244086

申请日：2011-09-23

Applicant: Hwa Yeul OH ,  O Sung Seo ,  Je Hyeong Park ,  Shin II Choi ,  Dong-Won Woo ,  Ji-Young Park ,  Jean Ho Song ,  Sang Gab Kim

Inventor： Hwa Yeul OH ,  O Sung Seo ,  Je Hyeong Park ,  Shin II Choi ,  Dong-Won Woo ,  Ji-Young Park ,  Jean Ho Song ,  Sang Gab Kim

IPC: H01L33/08 ,  H01L21/336

CPC classification number: H01L27/1259 ,  G02F1/136286

Abstract: In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer.

Abstract translation: 在根据本发明的示例性实施例的薄膜晶体管阵列面板中，在沉积钝化层之前进行使用包括氢气和含有预定值的氮气的混合气体的等离子体处理。 以这种方式，可以防止薄膜晶体管的性能恶化，并且同时可以防止透明电极中的雾度。 或者，第一钝化层被剥离，然后除去。 再次沉积钝化层，使得在所得钝化层中存在很少或没有雾度。

公开(公告)号：US20120199838A1

公开(公告)日：2012-08-09

申请号：US13310005

申请日：2011-12-02

Applicant: Jeong Min PARK ,  Dong-Won WOO ,  Je Hyeong PARK ,  Sang Gab KIM ,  Jung-Soo LEE ,  Ji-Hyun KIM

Inventor： Jeong Min PARK ,  Dong-Won WOO ,  Je Hyeong PARK ,  Sang Gab KIM ,  Jung-Soo LEE ,  Ji-Hyun KIM

IPC: H01L21/336 ,  H01L29/786 ,  H01L29/04

CPC classification number: H01L29/786 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/78645

Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.

Abstract translation: 薄膜晶体管阵列板的制造方法包括：使用非过氧化物的蚀刻剂，在基板上同时形成栅极导体和第一电极; 在所述栅极导体和所述第一电极上形成栅极绝缘层; 在栅极绝缘层上形成半导体，源电极和漏电极; 在半导体，源电极和漏电极上形成钝化层; 以及在所述钝化层上形成第二电极层。

公开(公告)号：US07696027B2

公开(公告)日：2010-04-13

申请号：US11856450

申请日：2007-09-17

Applicant: Woo-Sik Cho ,  Yun-Seok Lee ,  Dong-Won Woo ,  Ji-Hyeon Son

Inventor： Woo-Sik Cho ,  Yun-Seok Lee ,  Dong-Won Woo ,  Ji-Hyeon Son

IPC: H01L29/74

CPC classification number: G02F1/13394 ,  G02F2001/134318 ,  G02F2001/136236

Abstract: Disclosed is a method of fabricating a display substrate. A black matrix and a color filter layer are formed on a base substrate, and then a transparent electrode and a photoresist layer pattern are sequentially formed. The transparent electrode is patterned using the photoresist layer pattern as a mask to form a common electrode, and a spacer is formed using the photoresist layer pattern.

Abstract translation: 公开了一种制造显示基板的方法。 在基底基板上形成黑色矩阵和滤色器层，然后依次形成透明电极和光致抗蚀剂层图案。 使用光致抗蚀剂层图案作为掩模对透明电极进行图案化以形成公共电极，并且使用光致抗蚀剂层图案形成间隔物。