公开(公告)号：US4860165A

公开(公告)日：1989-08-22

申请号：US187057

申请日：1988-04-27

Applicant: Edgar Cassinelli

Inventor： Edgar Cassinelli

IPC: H01L23/36 ,  H01L23/473 ,  H01L23/498 ,  H01L23/64

CPC classification number: H01L23/473 ,  H01L23/36 ,  H01L23/498 ,  H01L23/49822 ,  H01L23/642 ,  H01L2224/48095 ,  H01L2924/00014 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/30107 ,  H01L2924/3011

Abstract: A semiconductor chip carrier package formed of a multi-layer circuit board having mounted therein a semiconductor chip support pad. The multi-layer circuit board is comprised of separate dielectric boards defining multiple conductive run layers including a signal layer and a plurality of power layers. A pluralilty of pins supported from the circuit board extending from one side thereof and including signal pins and power pins. The power pins are disposed peripherally outside of the signal pins. Means are provided for conductively connecting leads of the semiconductor chip to corresponding conductive runs of the signal and power layers.

Abstract translation: 一种半导体芯片载体封装，其由安装有半导体芯片支撑垫的多层电路板形成。 多层电路板由限定多个导电延伸层的单独介电板组成，包括信号层和多个功率层。 从电路板支撑的多个引脚，其从其一侧延伸并且包括信号引脚和电源引脚。 电源引脚外围设置在信号引脚之外。 提供了用于将半导体芯片的导线导通地连接到信号和功率层的相应导电运行的装置。