公开(公告)号：US5677230A

公开(公告)日：1997-10-14

申请号：US566333

申请日：1995-12-01

申请人： Charles E. Weitzel ,  Edward L. Fisk ,  Sung P. Pack

发明人： Charles E. Weitzel ,  Edward L. Fisk ,  Sung P. Pack

IPC分类号： H01L21/3105 ,  H01L21/76 ,  H01L21/762 ,  H01L21/302 ,  H01L21/304 ,  H01L21/306

CPC分类号： H01L21/7605 ,  H01L21/31051 ,  H01L21/7602 ,  H01L21/76224 ,  Y10S438/906

摘要： A method of planarizing wide bandgap semiconductor devices selected from a group including SiC, GaN and diamond having a mesa defined thereon by a trench with a depth of 1 to 2 micrometers and a width of 2 to 10 micrometers. A layer of dielectric material is deposited on the substrate overlying and surrounding the mesa, to a height approximately equal to the height of the mesa and the dielectric material is etched from atop the mesa and from a surrounding area. Layers of spin on glass are deposited to fill the surrounding area and etched to achieve a planar surface including the mesa and the layer of dielectric material.

摘要翻译： 平面化宽度带隙半导体器件的方法，该宽带隙半导体器件从包括SiC，GaN和金刚石的组中选择，其具有通过深度为1至2微米和宽度为2至10微米的沟槽在其上限定的台面。 介电材料层沉积在覆盖并围绕台面的基板上，高度大约等于台面的高度，并且电介质材料从台面顶部和周围区域被蚀刻。 沉积玻璃上的层以填充周围区域并蚀刻以实现包括台面和电介质材料层的平面。

公开(公告)号：US5796122A

公开(公告)日：1998-08-18

申请号：US853283

申请日：1997-05-09

申请人： Charles E. Weitzel ,  Edward L. Fisk ,  Sung P. Pack

发明人： Charles E. Weitzel ,  Edward L. Fisk ,  Sung P. Pack

IPC分类号： H01L21/3105 ,  H01L21/76 ,  H01L21/762 ,  H01L29/12

CPC分类号： H01L21/7605 ,  H01L21/31051 ,  H01L21/7602 ,  H01L21/76224 ,  Y10S438/906

摘要： A method of planarizing wide bandgap semiconductor devices selected from a group including SiC, GaN and diamond having a mesa defined thereon by a trench with a depth of 1 to 2 micrometers and a width of 2 to 10 micrometers. A layer of dielectric material is deposited on the substrate overlying and surrounding the mesa, to a height approximately equal to the height of the mesa and the dielectric material is etched from atop the mesa and from a surrounding area. Layers of spin on glass are deposited to fill the surrounding area and etched to achieve a planar surface including the mesa and the layer of dielectric material.

摘要翻译： 平面化宽度带隙半导体器件的方法，该宽带隙半导体器件从包括SiC，GaN和金刚石的组中选择，其具有通过深度为1至2微米和宽度为2至10微米的沟槽在其上限定的台面。 介电材料层沉积在覆盖并围绕台面的基板上，高度大约等于台面的高度，并且电介质材料从台面顶部和周围区域被蚀刻。 沉积玻璃上的层以填充周围区域并进行蚀刻以实现包括台面和电介质材料层的平面。