摘要:
A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to the input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current and the average current, wherein the average current comprises the average of the first current and the second current. Drive circuitry generates drive signals responsive to each of the first output PWM drive signal and the second output PWM drive signal.
摘要:
A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.
摘要:
Systems, methods, and apparatus for improving steady state operation of a pulse width modulator during transient and soft start events are described herein. An apparatus can include a phase component configured to adaptively modify a pulse width of a first pulse width modulated (PWM) output signal based on a pulse width of a PWM input signal. Further, the apparatus can include a power stage component configured to source at least one of a voltage or a current to a load based on the first PWM output signal. In one example, the phase component can be configured to linearly extend the pulse width of the first PWM output signal based on the pulse width of the PWM input signal. In another example, the phase component can be configured to adaptively modify the pulse width of the first PWM output signal based on a predetermined maximum pulse width.
摘要:
A phase doubler driver circuit includes first control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to an input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current.
摘要:
A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.
摘要:
Systems, methods, and apparatus for improving steady state operation of a pulse width modulator during transient and soft start events are described herein. An apparatus can include a phase component configured to adaptively modify a pulse width of a first pulse width modulated (PWM) output signal based on a pulse width of a PWM input signal. Further, the apparatus can include a power stage component configured to source at least one of a voltage or a current to a load based on the first PWM output signal. In one example, the phase component can be configured to linearly extend the pulse width of the first PWM output signal based on the pulse width of the PWM input signal. In another example, the phase component can be configured to adaptively modify the pulse width of the first PWM output signal based on a predetermined maximum pulse width.