公开(公告)号：US07430657B2

公开(公告)日：2008-09-30

申请号：US10748173

申请日：2003-12-31

申请人： Tal Gat ,  Franck Sala ,  Eran Altshuler

发明人： Tal Gat ,  Franck Sala ,  Eran Altshuler

IPC分类号： G06F9/00

CPC分类号： G06F9/3806 ,  G06F9/3844

摘要： A system, method and device for storing branch predictions in a queue that may be connected to a branch prediction unit, and for delivering the stored predictions to an instruction fetch unit. A look up may be made of for example two sequential lines, and for example a segmented cache of a branch prediction unit may generate predictions of an address having an even numbered index by referring to for example a first side of the cache, and an address with an odd numbered index by referring to for example a second side of the cache. Branch predictions for two sequential lines may be generated during for example a prediction period such as two clock cycles. In some embodiments, a next instruction pointer of a branch prediction unit may be independent or decoupled from of a next instruction pointer of an instruction fetch unit.

摘要翻译： 一种用于在可以连接到分支预测单元的队列中存储分支预测并将所存储的预测传送到指令获取单元的系统，方法和装置。 可以例如查找两个连续的行，并且例如分支预测单元的分段高速缓存可以通过参考例如高速缓存的第一侧来生成具有偶数索引的地址的预测，以及地址 通过参考例如高速缓存的第二侧的奇数索引。 可以在例如两个时钟周期的预测周期期间产生两条连续线的分支预测。 在一些实施例中，分支预测单元的下一个指令指针可以与指令获取单元的下一个指令指针是独立的或去耦合的。

公开(公告)号：US07174444B2

公开(公告)日：2007-02-06

申请号：US10402145

申请日：2003-03-31

申请人： Eran Altshuler ,  Oded Lempel ,  Robert Valentine ,  Nicolas Kacevas

发明人： Eran Altshuler ,  Oded Lempel ,  Robert Valentine ,  Nicolas Kacevas

IPC分类号： G06F9/30

CPC分类号： G06F9/3844

摘要： A system and method of early branch prediction in a processor to evaluate, typically before a full branch prediction is made, ways in a branch target buffer to determine if any of said ways corresponds to a valid unconditional branch, and upon such determination, to generate a signal to prevent a read of a next sequential chunk.

摘要翻译： 一种处理器中早期分支预测的系统和方法，通常在进行全分支预测之前评估分支目标缓冲器中的方式，以确定所述方法中的任何一种是否对应于有效的无条件分支，并且在这种确定时，生成 一个防止读取下一个连续块的信号。

公开(公告)号：US20050149708A1

公开(公告)日：2005-07-07

申请号：US10748173

申请日：2003-12-31

申请人： Tal Gat ,  Franck Sala ,  Eran Altshuler

发明人： Tal Gat ,  Franck Sala ,  Eran Altshuler

IPC分类号： G06F9/38 ,  G06F9/44

CPC分类号： G06F9/3806 ,  G06F9/3844

摘要： A system, method and device for storing branch predictions in a queue that may be connected to a branch prediction unit, and for delivering the stored predictions to an instruction fetch unit. A look up may be made of for example two sequential lines, and for example a segmented cache of a branch prediction unit may generate predictions of an address having an even numbered index by referring to for example a first side of the cache, and an address with an odd numbered index by referring to for example a second side of the cache. Branch predictions for two sequential lines may be generated during for example a prediction period such as two clock cycles. In some embodiments, a next instruction pointer of a branch prediction unit may be independent or decoupled from of a next instruction pointer of an instruction fetch unit.

摘要翻译： 一种用于在可以连接到分支预测单元的队列中存储分支预测并将所存储的预测传送到指令获取单元的系统，方法和装置。 可以例如查找两个连续的行，并且例如分支预测单元的分段高速缓存可以通过参考例如高速缓存的第一侧来生成具有偶数索引的地址的预测，以及地址 通过参考例如高速缓存的第二侧的奇数索引。 可以在例如两个时钟周期的预测周期期间产生两条连续线的分支预测。 在一些实施例中，分支预测单元的下一个指令指针可以与指令获取单元的下一个指令指针是独立的或去耦合的。

公开(公告)号：US07058795B2

公开(公告)日：2006-06-06

申请号：US10178555

申请日：2002-06-25

申请人： Nicolas Kacevas ,  Eran Altshuler

发明人： Nicolas Kacevas ,  Eran Altshuler

IPC分类号： G06F9/38

CPC分类号： G06F9/3848

摘要： Briefly, a method and apparatus of branch prediction is provided. The branch prediction may be done by performing a XOR operation between MSB of set bits of a path register with LSB of set bits of an instruction pointer address register to provide a global index, and by performing a XOR operation of LSB tag bits of the path register with MSB tag bits of the instruction pointer address register and providing a tag index. There may be multiplexing between a global prediction to a local prediction.

公开(公告)号：US20060036834A1

公开(公告)日：2006-02-16

申请号：US10917582

申请日：2004-08-13

申请人： Subramaniam Maiyuran ,  Peter Smith ,  Varghese George ,  Eran Altshuler ,  Robert Valentine ,  Zeev Offen ,  Oded Lempel

发明人： Subramaniam Maiyuran ,  Peter Smith ,  Varghese George ,  Eran Altshuler ,  Robert Valentine ,  Zeev Offen ,  Oded Lempel

IPC分类号： G06F9/30

CPC分类号： G06F9/3808 ,  G06F9/325

摘要： A trace management architecture to enable the reuse of uops within one or more repeated traces. More particularly, embodiments of the invention relate to a technique to prevent multiple accesses to various functional units within a trace management architecture by reusing traces or sequences of traces that are repeated during a period of operation of the microprocessor, avoiding performance gaps due to multiple trace cache accesses and increasing the rate at which uops can be executed within a processor.

摘要翻译： 一种跟踪管理架构，可以在一个或多个重复轨迹中重新使用uops。 更具体地，本发明的实施例涉及通过重复使用在微处理器的操作期间重复的迹线或迹线序列来防止对跟踪管理架构内的各种功能单元的多次访问的技术，从而避免由于多个跟踪而导致的性能差距 高速缓存访​​问并增加可以在处理器内执行uop的速率。