Device, system, and method of speculative packet transmission
    1.
    发明授权
    Device, system, and method of speculative packet transmission 有权
    设备,系统和推测分组传输的方法

    公开(公告)号:US07827325B2

    公开(公告)日:2010-11-02

    申请号:US11931689

    申请日:2007-10-31

    IPC分类号: G06F13/38

    CPC分类号: G06F13/387

    摘要: A mechanism for speculative packet transmission including a credit-based flow control interconnect device to initiate speculative transmission of a Transaction Layer Packet if the number of available flow control (FC) credits is insufficient for completing the transmission. The sending device initiates a speculative transmission of packets to the receiving device even though the packet for transmission requires a number of FC credits greater than the available FC credits. If the additional FC credits required to complete the packet transmission become available to the sending device before the transmission is completed, the packets are then fully transmitted by the sending device. Otherwise, if the additional FC credits required do not become available prior to completion of the transmission, then the sending device aborts the transmission without utilization of the FC credits. The sending device may initiate speculative packet transmission only if a particular minimal amount of FC credits is available.

    摘要翻译: 一种用于推测分组传输的机制,包括基于信用的流控制互连设备,用于如果可用流控制(FC)信用的数量不足以完成传输,则启动事务层分组的推测传输。 发送设备发起分组到接收设备的推测传输,即使用于传输的分组需要大于可用FC信用的多个FC信用。 如果完成分组传输所需的附加FC信用在发送完成之前对发送设备可用,则发送设备将完全发送分组。 否则,如果在完成传输之前所​​需的附加FC信用不可用,则发送设备在不使用FC信用的情况下中止传输。 只有当特定的最小量的FC信用可用时,发送设备才能启动推测性分组传输。

    Data mask coding
    2.
    发明授权

    公开(公告)号:US06611211B2

    公开(公告)日:2003-08-26

    申请号:US09849210

    申请日:2001-05-04

    IPC分类号: H03M700

    CPC分类号: G06F7/764 G06F9/30018

    摘要: A method for encoding a data mask that consists of a given total number of bits and includes a selected group of contiguous bits within the total number, the selected group having a left end and a right end. The method includes dividing the data mask into a plurality of segments, and representing the segments by respective segment codes, each code indicating whether the bits in the respective segment fall entirely outside the selected group, entirely within the selected group, or include the left end or the right end of the group. The segment codes are combined so as to generate a mask code, which can be decoded to reconstruct the data mask.

    Polling of a target register within a peripheral device
    3.
    发明授权
    Polling of a target register within a peripheral device 失效
    轮询外围设备内的目标寄存器

    公开(公告)号:US08417851B2

    公开(公告)日:2013-04-09

    申请号:US13169403

    申请日:2011-06-27

    CPC分类号: G06F13/28

    摘要: In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.

    摘要翻译: 在所公开的方法的示例中,目标寄存器的请求值可以被指定为执行所请求的读或写操作的前提条件。 请求的读或写操作可以由诸如处理器的请求设备生成,并且通过总线发送到包含目标寄存器的外围设备。 目标寄存器可以在外部轮询到外围设备,而不会在请求设备和外围设备之间产生额外的总线流量。 当目标寄存器的轮询值等于请求值时,环形拓扑可用于内部轮询目标寄存器并执行所请求的读或写操作。

    POLLING OF A TARGET REGISTER WITHIN A PERIPHERAL DEVICE
    4.
    发明申请
    POLLING OF A TARGET REGISTER WITHIN A PERIPHERAL DEVICE 失效
    在外围设备中检测目标寄存器

    公开(公告)号:US20120331184A1

    公开(公告)日:2012-12-27

    申请号:US13169403

    申请日:2011-06-27

    IPC分类号: G06F13/28

    CPC分类号: G06F13/28

    摘要: In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.

    摘要翻译: 在所公开的方法的示例中,目标寄存器的请求值可以被指定为执行所请求的读或写操作的前提条件。 请求的读或写操作可以由诸如处理器的请求设备生成,并且通过总线发送到包含目标寄存器的外围设备。 目标寄存器可以在外部轮询到外围设备,而不会在请求设备和外围设备之间产生额外的总线流量。 当目标寄存器的轮询值等于请求值时,环形拓扑可用于内部轮询目标寄存器并执行所请求的读或写操作。

    Detection of frame marker quality
    5.
    发明授权
    Detection of frame marker quality 失效
    检测帧标记质量

    公开(公告)号:US08249177B2

    公开(公告)日:2012-08-21

    申请号:US12397790

    申请日:2009-03-04

    IPC分类号: H04L27/00

    CPC分类号: H04L7/042 H04L1/20 H04L7/046

    摘要: For example, a method of detecting frame marker quality includes: detecting, in a bit-stream sent from a first component to a second component of a common hardware unit, a frame marker having a bit pattern different from an uncorrupted frame marker specified by a communication protocol; and assigning a quality level indicator to the frame marker based on a difference between said bit pattern and a bit pattern of said uncorrupted frame marker.

    摘要翻译: 例如,检测帧标记质量的方法包括:在从第一分量发送到公共硬件单元的第二分量的比特流中检测具有不同于由 通信协议; 以及基于所述位模式和所述未损坏帧标记的位模式之间的差异,将质量水平指示符分配给帧标记。

    ADAPTIVE LINK WIDTH CONTROL
    6.
    发明申请
    ADAPTIVE LINK WIDTH CONTROL 审中-公开
    自适应链路宽度控制

    公开(公告)号:US20090187683A1

    公开(公告)日:2009-07-23

    申请号:US12017735

    申请日:2008-01-22

    IPC分类号: G06F3/00

    CPC分类号: H04L47/10 H04L47/2416

    摘要: A communications apparatus uses at least one logical communications link that comprises a plurality of lanes within a computerized hardware device. A data transfer monitor is connected to the logical communications link and measures the real-time data transfer bandwidth of the logical communications link. In addition, a link management unit or link width control unit (comparator) is connected to the lanes and to the data transfer monitor and continually compares the real-time data transfer bandwidth to a predetermined data transfer bandwidth standard. If the real-time data transfer bandwidth is below the predetermined data transfer bandwidth standard, the link management unit is adapted to perform up-configuring of the logical communications link by activating additional lanes up to a maximum number of lanes making up the logical communications link. Conversely, if the real-time data transfer bandwidth is above the predetermined data transfer bandwidth standard, the link management unit is adapted to perform down-configuring the logical communications link by deactivating lanes within the logical communications link. The lanes consume less power when the lanes are deactivated relative to when the lanes are activated, thus the down-configuring reduces power consumption.

    摘要翻译: 通信装置使用至少一个逻辑通信链路,其包括计算机化的硬件设备内的多条通道。 数据传输监视器连接到逻辑通信链路,并测量逻辑通信链路的实时数据传输带宽。 此外,链路管理单元或链路宽度控制单元(比较器)连接到通道和数据传输监视器,并将实时数据传输带宽连续地与预定的数据传输带宽标准进行比较。 如果实时数据传输带宽低于预定的数据传输带宽标准,则链路管理单元适于通过激活附加通道来执行逻辑通信链路的上配置,最多数目的通道组成逻辑通信链路 。 相反,如果实时数据传输带宽高于预定的数据传输带宽标准,则链路管理单元适于通过停用逻辑通信链路内的通道来执行逻辑通信链路的下配置。 当通道相对于通道被激活时,通道消耗较少的功率,因此下配置降低功耗。

    Device, System, and Method of Handling Transactions
    7.
    发明申请
    Device, System, and Method of Handling Transactions 有权
    设备,系统和处理交易的方法

    公开(公告)号:US20090177822A1

    公开(公告)日:2009-07-09

    申请号:US11969475

    申请日:2008-01-04

    IPC分类号: G06F13/18

    CPC分类号: G06F13/362

    摘要: Some embodiments include, for example, devices, systems, and methods of handling transactions. In some demonstrative embodiments, an apparatus to handle transactions in a computing system may include a master unit to arbitrate between read and write requests to be issued over a request bus according to at least first and second arbitration schemes. A first ratio between read and write requests issued by the master unit according to the first arbitration scheme may be different from a second ratio between read and write requests issued by the master unit according to the second arbitration scheme.

    摘要翻译: 一些实施例包括例如处理事务的设备,系统和方法。 在一些说明性实施例中,处理计算系统中的事务的装置可以包括主单元,用于根据至少第一和第二仲裁方案通过请求总线发出读请求和写请求之间进行仲裁。 由主单元根据第一仲裁方案发出的读和写请求之间的第一比率可以不同于主单元根据第二仲裁方案发出的读和写请求之间的第二比率。

    Device, System, and Method of Speculative Packet Transmission
    8.
    发明申请
    Device, System, and Method of Speculative Packet Transmission 有权
    设备,系统和投机包传输方法

    公开(公告)号:US20090113082A1

    公开(公告)日:2009-04-30

    申请号:US11931689

    申请日:2007-10-31

    IPC分类号: G06F3/00

    CPC分类号: G06F13/387

    摘要: Device, system and method of speculative packet transmission. For example, an apparatus for speculative packet transmission includes: a credit-based flow control interconnect device to initiate speculative transmission of a Transaction Layer Packet if a number of available flow control credits is insufficient for completing the transmission.

    摘要翻译: 推测分组传输的设备,系统和方法。 例如,用于推测分组传输的装置包括:基于信用的流控制互连设备,用于如果多个可用流量控制信用不足以完成传输,则启动事务层分组的推测传输。

    Decode data for fast PCI express multi-function device address decode
    9.
    发明授权
    Decode data for fast PCI express multi-function device address decode 有权
    解码数据,实现快速PCI Express多功能设备地址解码

    公开(公告)号:US09032102B2

    公开(公告)日:2015-05-12

    申请号:US13411203

    申请日:2012-03-02

    IPC分类号: G06F13/36 G06F9/30

    摘要: An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices.

    摘要翻译: 一种使用目标功能数据查找表的快速PCIe多功能设备地址解码的设备和方法。 在PCIe请求分组内提供一个或多个解码指令(例如,目标函数),从而消除在端点设备中的解码过程期间对目标函数搜索的需要。 这使得复杂多功能设备中的单解码器单步解码实现成为可能。

    Decode Data for Fast PCI Express Multi-Function Device Address Decode
    10.
    发明申请
    Decode Data for Fast PCI Express Multi-Function Device Address Decode 有权
    解码快速PCI Express多功能设备地址解码数据

    公开(公告)号:US20130232279A1

    公开(公告)日:2013-09-05

    申请号:US13411203

    申请日:2012-03-02

    IPC分类号: G06F13/36 G06F3/00

    摘要: An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices.

    摘要翻译: 一种使用目标功能数据查找表的快速PCIe多功能设备地址解码的设备和方法。 在PCIe请求分组内提供一个或多个解码指令(例如,目标函数),从而消除在端点设备中的解码过程期间对目标函数搜索的需要。 这使得复杂多功能设备中的单解码器单步解码实现成为可能。