摘要:
A mechanism for speculative packet transmission including a credit-based flow control interconnect device to initiate speculative transmission of a Transaction Layer Packet if the number of available flow control (FC) credits is insufficient for completing the transmission. The sending device initiates a speculative transmission of packets to the receiving device even though the packet for transmission requires a number of FC credits greater than the available FC credits. If the additional FC credits required to complete the packet transmission become available to the sending device before the transmission is completed, the packets are then fully transmitted by the sending device. Otherwise, if the additional FC credits required do not become available prior to completion of the transmission, then the sending device aborts the transmission without utilization of the FC credits. The sending device may initiate speculative packet transmission only if a particular minimal amount of FC credits is available.
摘要:
A method for encoding a data mask that consists of a given total number of bits and includes a selected group of contiguous bits within the total number, the selected group having a left end and a right end. The method includes dividing the data mask into a plurality of segments, and representing the segments by respective segment codes, each code indicating whether the bits in the respective segment fall entirely outside the selected group, entirely within the selected group, or include the left end or the right end of the group. The segment codes are combined so as to generate a mask code, which can be decoded to reconstruct the data mask.
摘要:
In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.
摘要:
In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.
摘要:
For example, a method of detecting frame marker quality includes: detecting, in a bit-stream sent from a first component to a second component of a common hardware unit, a frame marker having a bit pattern different from an uncorrupted frame marker specified by a communication protocol; and assigning a quality level indicator to the frame marker based on a difference between said bit pattern and a bit pattern of said uncorrupted frame marker.
摘要:
A communications apparatus uses at least one logical communications link that comprises a plurality of lanes within a computerized hardware device. A data transfer monitor is connected to the logical communications link and measures the real-time data transfer bandwidth of the logical communications link. In addition, a link management unit or link width control unit (comparator) is connected to the lanes and to the data transfer monitor and continually compares the real-time data transfer bandwidth to a predetermined data transfer bandwidth standard. If the real-time data transfer bandwidth is below the predetermined data transfer bandwidth standard, the link management unit is adapted to perform up-configuring of the logical communications link by activating additional lanes up to a maximum number of lanes making up the logical communications link. Conversely, if the real-time data transfer bandwidth is above the predetermined data transfer bandwidth standard, the link management unit is adapted to perform down-configuring the logical communications link by deactivating lanes within the logical communications link. The lanes consume less power when the lanes are deactivated relative to when the lanes are activated, thus the down-configuring reduces power consumption.
摘要:
Some embodiments include, for example, devices, systems, and methods of handling transactions. In some demonstrative embodiments, an apparatus to handle transactions in a computing system may include a master unit to arbitrate between read and write requests to be issued over a request bus according to at least first and second arbitration schemes. A first ratio between read and write requests issued by the master unit according to the first arbitration scheme may be different from a second ratio between read and write requests issued by the master unit according to the second arbitration scheme.
摘要:
Device, system and method of speculative packet transmission. For example, an apparatus for speculative packet transmission includes: a credit-based flow control interconnect device to initiate speculative transmission of a Transaction Layer Packet if a number of available flow control credits is insufficient for completing the transmission.
摘要:
An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices.
摘要:
An apparatus and method of fast PCIe multi-function device address decode utilizing a target function data look up table. One or more decode directives (e.g., targeted functions) are provided within the PCIe request packet, thereby eliminating the need for target function search during the decode process in the endpoint device. This enables single-decoder single-step decode implementation in complex multi-function devices.