公开(公告)号：US08603893B1

公开(公告)日：2013-12-10

申请号：US13474443

申请日：2012-05-17

申请人： Andy C. Wei ,  Francis C. Tambwe ,  Frank Scott Johnson

发明人： Andy C. Wei ,  Francis C. Tambwe ,  Frank Scott Johnson

IPC分类号： H01L21/76

CPC分类号： H01L21/76229 ,  H01L21/3086 ,  H01L21/823821 ,  H01L29/6681

摘要： Methods are provided for fabricating FinFET integrated circuits on bulk semiconductor substrates. In accordance with one embodiment a patterned hard mask that defines locations of a regular array of a plurality of fins is formed overlying a semiconductor substrate. Portions of the patterned hard mask are removed using a cut mask to form a modified hard mask. The substrate is etched using the modified hard mask as an etch mask to form a plurality of fins extending upwardly from the substrate and separated by trenches. Selected ones of the plurality of fins are at least partially removed to form isolation regions and an insulating material is deposited to fill the trenches and to cover the at least partially removed selected ones of the plurality of fins.

摘要翻译： 提供了用于在体半导体衬底上制造FinFET集成电路的方法。 根据一个实施例，形成覆盖半导体衬底的限定多个翅片的规则阵列的位置的图案化硬掩模。 使用切割掩模去除图案化硬掩模的部分以形成修改的硬掩模。 使用改进的硬掩模作为蚀刻掩模蚀刻衬底，以形成从衬底向上延伸并由沟槽分离的多个鳍。 至少部分地去除多个翅片中的选定的翅片以形成隔离区域，并且沉积绝缘材料以填充沟槽并且覆盖多个翅片中的至少部分移除的选定翼片。

公开(公告)号：US20130309838A1

公开(公告)日：2013-11-21

申请号：US13474443

申请日：2012-05-17

申请人： Andy C. Wei ,  Francis C. Tambwe ,  Frank Scott Johnson

发明人： Andy C. Wei ,  Francis C. Tambwe ,  Frank Scott Johnson

IPC分类号： H01L21/762

CPC分类号： H01L21/76229 ,  H01L21/3086 ,  H01L21/823821 ,  H01L29/6681

摘要： Methods are provided for fabricating FinFET integrated circuits on bulk semiconductor substrates. In accordance with one embodiment a patterned hard mask that defines locations of a regular array of a plurality of fins is formed overlying a semiconductor substrate. Portions of the patterned hard mask are removed using a cut mask to form a modified hard mask. The substrate is etched using the modified hard mask as an etch mask to form a plurality of fins extending upwardly from the substrate and separated by trenches. Selected ones of the plurality of fins are at least partially removed to form isolation regions and an insulating material is deposited to fill the trenches and to cover the at least partially removed selected ones of the plurality of fins.

摘要翻译： 提供了用于在体半导体衬底上制造FinFET集成电路的方法。 根据一个实施例，形成覆盖半导体衬底的限定多个翅片的规则阵列的位置的图案化硬掩模。 使用切割掩模去除图案化硬掩模的部分以形成修改的硬掩模。 使用改进的硬掩模作为蚀刻掩模蚀刻衬底，以形成从衬底向上延伸并由沟槽分离的多个鳍。 至少部分地去除多个翅片中的选定的翅片以形成隔离区域，并且沉积绝缘材料以填充沟槽并且覆盖多个翅片中的至少部分移除的选定翼片。