PORTABLE USB DEVICE THAT BOOTS A COMPUTER AS A SERVER
    1.
    发明申请
    PORTABLE USB DEVICE THAT BOOTS A COMPUTER AS A SERVER 审中-公开
    便携式USB设备,将计算机作为服务器

    公开(公告)号:US20090013165A1

    公开(公告)日:2009-01-08

    申请号:US11846476

    申请日:2007-08-28

    IPC分类号: G06F15/177

    摘要: Techniques for booting a host computer from a portable storage device with customized settings have been described herein. According to one embodiment, in response to detecting a portable storage device inserted into a first host computer having a first operating environment provided by a first operating system (OS) installed in the first host computer, rebooting the first host computer into a second operating environment using a second OS image stored in the portable device. In addition, a personal configuration file stored in the portable device is extracted to configure the second operating environment of the first host computer, such that the user of the portable storage device can operate the second host computer in view of the personal working environment. Other methods and apparatuses are also described.

    摘要翻译: 这里已经描述了用于通过定制设置从便携式存储设备引导主计算机的技术。 根据一个实施例,响应于检测到插入具有由安装在第一主机计算机中的第一操作系统(OS)提供的第一操作环境的第一主机计算机的便携式存储设备,将第一主计算机重新启动到第二操作环境 使用存储在便携式设备中的第二OS图像。 此外,提取存储在便携式设备中的个人配置文件以配置第一主计算机的第二操作环境,使得便携式存储设备的用户可以根据个人工作环境来操作第二主计算机。 还描述了其它方法和装置。

    Rudimentary digital speech interpolation apparatus and method
    3.
    发明授权
    Rudimentary digital speech interpolation apparatus and method 失效
    基本数字语音插值设备及方法

    公开(公告)号:US5065395A

    公开(公告)日:1991-11-12

    申请号:US506678

    申请日:1990-04-09

    IPC分类号: H04J3/17

    CPC分类号: H04J3/172

    摘要: Rudimentary digital speech interpolation apparatus for compressing data on a plurality of channels is disclosed, which includes circuitry for receiving data bits and control bits for each channel. The presence of silence on each channel is determined in response to the received data bits and zero bits are allocated for any silent channel in a frame structure. In addition, circuitry also allocates x bits per channel for the data bits in an non-silent channel in the frame. At least six bits per channel are also allocated for the control bits in the frame. 4N such frames are grouped to form a multi-frame.

    摘要翻译: 公开了用于在多个通道上压缩数据的基本数字语音内插装置,其包括用于接收每个通道的数据位和控制位的电路。 响应于接收到的数据位确定每个信道上的静音的存在,并且为帧结构中的任何无声信道分配零位。 此外,电路还为帧中的非静音信道中的数据比特分配每个信道的x比特。 每个通道的至少六位也分配给帧中的控制位。 4N这样的帧被分组以形成多帧。

    ELECTRONIC DATA FLASH CARD WITH VARIOUS FLASH MEMORY CELLS
    5.
    发明申请
    ELECTRONIC DATA FLASH CARD WITH VARIOUS FLASH MEMORY CELLS 审中-公开
    具有各种闪存存储器的电子数据闪存卡

    公开(公告)号:US20080071978A1

    公开(公告)日:2008-03-20

    申请号:US11929847

    申请日:2007-10-30

    IPC分类号: G06F12/00

    摘要: An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

    摘要翻译: 电子数据闪存卡可由主机访问,并且包括连接到存储数据文件的闪存设备的处理单元,以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中,电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元(FIFO),用于在后台进程中回收闪速存储器件的过时扇区,使得它们可用于重新编程。

    N:1 bit compression apparatus and method
    6.
    发明授权
    N:1 bit compression apparatus and method 失效
    N:1位压缩装置和方法

    公开(公告)号:US5280532A

    公开(公告)日:1994-01-18

    申请号:US506452

    申请日:1990-04-09

    IPC分类号: H04J3/00 H04J3/17 G10L7/08

    CPC分类号: G10L19/00 H04J3/172

    摘要: An N:1 data compression system for compressing data on N DS1 trunks carrying 4N channels is disclosed. Waveform encoding circuitry is coupled to the N DS1 trunks for compressing the DS1 data into x bits and producing both encoded data and control parameters, where x.ltoreq.8. The system further includes circuitry coupled to the waveform encoding circuitry for receiving the encoded data and control parameters, performing digital speech interpolation and producing data packets which may include encoded data and control parameters that are transmittable on a single DS1 trunk.

    摘要翻译: 公开了一种用于压缩携带4N信道的N个DS1中继上的数据的N:1数据压缩系统。 波形编码电路耦合到N DS1中继线,用于将DS1数据压缩为x位,并产生编码数据和控制参数,其中x <= 8。 该系统还包括耦合到波形编码电路的电路,用于接收编码数据和控制参数,执行数字语音内插并产生可包括可在单个DS1中继线上传送的编码数据和控制参数的数据分组。