公开(公告)号：US09753516B2

公开(公告)日：2017-09-05

申请号：US13335628

申请日：2011-12-22

申请人： Ryan D. Wells ,  Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Gary A. Andrew

发明人： Ryan D. Wells ,  Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Gary A. Andrew

IPC分类号： G06F1/00 ,  G06F1/32

CPC分类号： G06F1/3206 ,  G06F1/324 ,  Y02D10/126

摘要： According to one embodiment of the invention, an integrated circuit device comprises one or more processor cores and a control unit coupled to the processor core(s). The control unit is adapted to control an operating frequency of at least one processor core based on an estimated activity level in lieu of a power level. The estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to that integrated circuit device.

公开(公告)号：US20120221873A1

公开(公告)日：2012-08-30

申请号：US13335628

申请日：2011-12-22

申请人： Ryan D. Wells ,  Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Gary A. Andrew

发明人： Ryan D. Wells ,  Avinash N. Ananthakrishnan ,  Efraim Rotem ,  Doron Rajwan ,  Gary A. Andrew

IPC分类号： G06F1/32

CPC分类号： G06F1/3206 ,  G06F1/324 ,  Y02D10/126

摘要： According to one embodiment of the invention, an integrated circuit device comprises one or more processor cores and a control unit coupled to the processor core(s). The control unit is adapted to control an operating frequency of at least one processor core based on an estimated activity level in lieu of a power level. The estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to that integrated circuit device.

摘要翻译： 根据本发明的一个实施例，集成电路设备包括一个或多个处理器核和耦合到处理器核的控制单元。 控制单元适于基于代替功率电平的估计的活动水平来控制至少一个处理器核心的工作频率。 估计的活动水平与估计的功率水平不同，独立于该集成电路设备特有的泄漏功率和电压特性。