公开(公告)号：US07915608B2

公开(公告)日：2011-03-29

申请号：US12463338

申请日：2009-05-08

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/06

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。

公开(公告)号：US08119488B2

公开(公告)日：2012-02-21

申请号：US13034592

申请日：2011-02-24

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/778

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。

公开(公告)号：US20090283756A1

公开(公告)日：2009-11-19

申请号：US12463338

申请日：2009-05-08

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。

公开(公告)号：US20110140087A1

公开(公告)日：2011-06-16

申请号：US13034592

申请日：2011-02-24

Applicant: Geert Hellings ,  Geert Eneman ,  Marc Meuris

Inventor： Geert Hellings ,  Geert Eneman ,  Marc Meuris

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7783 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: A quantum well device and a method for manufacturing the same are disclosed. In one aspect, the device includes a quantum well region overlying a substrate, a gate region overlying a portion of the quantum well region, a source and drain region adjacent to the gate region. The quantum well region includes a buffer structure overlying the substrate and including semiconductor material having a first band gap, a channel structure overlying the buffer structure including a semiconductor material having a second band gap, and a barrier layer overlying the channel structure and including an un-doped semiconductor material having a third band gap. The first and third band gap are wider than the second band gap. Each of the source and drain region is self-aligned to the gate region and includes a semiconductor material having a doped region and a fourth band gap wider than the second band gap.

Abstract translation: 公开了一种量子阱器件及其制造方法。 一方面，该器件包括覆盖衬底的量子阱区域，覆盖量子阱区域的一部分的栅极区域，与栅极区域相邻的源极和漏极区域。 量子阱区域包括覆盖在衬底上并包括具有第一带隙的半导体材料的缓冲结构，覆盖缓冲结构的沟道结构，包括具有第二带隙的半导体材料，以及覆盖沟道结构的阻挡层， 具有第三带隙的掺杂半导体材料。 第一和第三带隙比第二带隙宽。 源区和漏区中的每一个与栅极区自对准，并且包括具有比第二带隙宽的掺杂区和第四带隙的半导体材料。