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公开(公告)号:US20180374922A1
公开(公告)日:2018-12-27
申请号:US15645844
申请日:2017-07-10
发明人: Chen-Wei Pan
IPC分类号: H01L29/36 , H01L21/265 , H01L21/225 , H01L21/28 , H01L29/49
CPC分类号: H01L29/365 , H01L21/2253 , H01L21/26533 , H01L21/28035 , H01L21/28176 , H01L29/0843 , H01L29/4916 , H01L29/78
摘要: A semiconductor structure including a substrate, a dielectric layer and a polysilicon layer is provided. The dielectric layer is disposed on the substrate. The polysilicon layer is disposed on the dielectric layer. A fluorine dopant concentration in the polysilicon layer presents Gaussian distributions from a top portion to a bottom portion of the polysilicon layer. Fluorine dopant peak concentrations of the Gaussian distributions are progressively decreased from the top portion to the bottom portion of the polysilicon layer.
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公开(公告)号:US20180277646A1
公开(公告)日:2018-09-27
申请号:US15990241
申请日:2018-05-25
发明人: Fu-Wei YAO , Chen-Ju YU , King-Yuen WONG , Chun-Wei HSU , Jiun-Lei Jerry YU , Fu-Chih YANG , Chun Lin TSAI
IPC分类号: H01L29/45 , H01L29/66 , H01L29/778 , H01L29/08 , H01L29/20 , H01L29/417 , H01L29/205 , H01L21/02 , H01L21/285
CPC分类号: H01L29/452 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/28575 , H01L29/0843 , H01L29/20 , H01L29/2003 , H01L29/205 , H01L29/41725 , H01L29/66462 , H01L29/7786 , H01L29/7787
摘要: A high electron mobility transistor (HEMT) includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second III-V compound layer between the salicide source feature and the salicide drain feature.
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公开(公告)号:US20180277628A1
公开(公告)日:2018-09-27
申请号:US15470352
申请日:2017-03-27
发明人: Zhenxing Bi , Kangguo Cheng , Juntao Li , Peng Xu
CPC分类号: H01L29/0684 , H01L21/28255 , H01L21/324 , H01L25/07 , H01L25/50 , H01L29/0843
摘要: Integrated chips and methods of forming the same include forming a respective stack of sheets in two regions, each stack having first layers and second layers. The second layers are etched away in the first region. The second region is annealed to change the composition of the first layers in the second region by interaction with the second layers in the second region. A gate stack is formed in the first and second region.
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公开(公告)号:US20180212026A1
公开(公告)日:2018-07-26
申请号:US15824364
申请日:2017-11-28
IPC分类号: H01L29/16 , C01B32/28 , B01J19/12 , C30B29/04 , C30B33/00 , H01L21/02 , H01L21/04 , H01L29/10 , H01L29/08
CPC分类号: H01L29/1602 , B01J19/123 , B01J19/127 , B01J2219/0879 , B01J2219/1203 , C01B32/28 , C01P2006/40 , C30B25/02 , C30B29/04 , C30B33/00 , H01L21/02527 , H01L21/0262 , H01L21/0405 , H01L29/0843 , H01L29/1075 , H01L29/772 , H01L29/78
摘要: New compositions of matter and device constructs are disclosed in the form of diamond material layers or films having one or more surfaces treated with chemically active radicals, e.g., photo-radical or thermal-radical generators to reduce and stabilize their surface resistance. The compositions exhibit stable, markedly lower surface resistances, e.g., below about 3 kΩ sq−1 or between about 3 and 2 kΩ sq−1 or below 2 kΩ sq−1, or below 1 kΩ sq−1, or lower. In certain embodiments, the diamond material is a epitaxial layer grown on a substrate, e.g., by microwave plasma chemical vapor deposition (CVD) and can have a thickness ranging from about 1 nm to 1 mm, preferably from about 10 nm to 500 μm, or from about 100 nm to 10 μm. The invention also encompasses semiconductor devices fabricated from the surface-modified diamond materials disclosed herein. For example, device can be a field effect transistor in which the diamond material provides a hole conductivity channel between a source region and a drain region that is activated by a voltage applied to an intermediate gate region. Methods are also disclosed for modifying diamond surfaces to decrease and stabilize their surface resistance.
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公开(公告)号:US10002958B2
公开(公告)日:2018-06-19
申请号:US15617982
申请日:2017-06-08
IPC分类号: H01L29/778 , H01L29/47 , H01L23/373 , H01L21/02 , H01L29/423 , H01L29/40 , H01L29/08 , H01L29/20 , H01L29/205 , H01L29/66 , H01L21/283 , H01L21/311
CPC分类号: H01L29/7787 , H01L21/02057 , H01L21/02115 , H01L21/0217 , H01L21/02378 , H01L21/0254 , H01L21/283 , H01L21/31111 , H01L23/3732 , H01L29/0843 , H01L29/0891 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/42316 , H01L29/475 , H01L29/66462 , H01L29/7786
摘要: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
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公开(公告)号:US09929262B2
公开(公告)日:2018-03-27
申请号:US15276242
申请日:2016-09-26
申请人: FUJITSU LIMITED
发明人: Masato Nishimori , Kozo Makiyama
IPC分类号: H01L29/778 , H01L21/265 , H01L23/66 , H01L29/66 , H03F1/32 , H03F3/19 , H03F3/21 , H01L29/08 , H03F3/24 , H01L29/417 , H01L29/20
CPC分类号: H01L29/7787 , H01L21/26546 , H01L23/66 , H01L29/0843 , H01L29/2003 , H01L29/41766 , H01L29/66462 , H01L29/7786 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257 , H01L2224/4903 , H03F1/3247 , H03F1/3252 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/204 , H03F2200/333
摘要: A semiconductor device includes a carrier transit layer including a first region and second and third regions having a density of a donor impurity element higher than that of the first region, an InXAlYGa(1-X-Y)N (0
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公开(公告)号:US09929248B2
公开(公告)日:2018-03-27
申请号:US15368346
申请日:2016-12-02
发明人: Chun-Hsiang Fan , Chun-Hsiung Lin , Mao-Lin Huang
IPC分类号: H01L21/338 , H01L29/66 , H01L29/417 , H01L29/205 , H01L21/306 , H01L29/08 , H01L29/423 , H01L29/267 , H01L29/778
CPC分类号: H01L29/66462 , H01L21/30617 , H01L29/0843 , H01L29/0891 , H01L29/205 , H01L29/267 , H01L29/41725 , H01L29/42316 , H01L29/7784
摘要: An embodiment high electron mobility transistor (HEMT) includes a gate electrode over a semiconductor substrate and a multi-layer semiconductor cap over the semiconductor substrate and adjacent the gate electrode. The multi-layer semiconductor cap includes a first semiconductor layer and a second semiconductor layer comprising a different material than the first semiconductor layer. The first semiconductor layer is laterally spaced apart from the gate electrode by a first spacing, and the second semiconductor layer is spaced apart from the gate electrode by a second spacing greater than the first spacing.
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公开(公告)号:US20170358670A1
公开(公告)日:2017-12-14
申请号:US15617982
申请日:2017-06-08
IPC分类号: H01L29/778 , H01L29/20 , H01L29/423 , H01L29/47 , H01L21/02 , H01L29/08 , H01L23/373 , H01L29/66 , H01L29/40 , H01L29/205 , H01L21/283 , H01L21/311
CPC分类号: H01L29/7787 , H01L21/02057 , H01L21/02115 , H01L21/0217 , H01L21/02378 , H01L21/0254 , H01L21/283 , H01L21/31111 , H01L23/3732 , H01L29/0843 , H01L29/0891 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/42316 , H01L29/475 , H01L29/66462 , H01L29/7786
摘要: Systems and method are provided for depositing metal on GaN transistors after gate formation using a metal nitride Schottky gate. Embodiments of the present disclosure use a “diamond last” process using thermally stable metal nitride gate electrodes to enable thicker heat spreading films and facilitate process integration. In an embodiment, the “diamond last” process with high thermal conductivity diamond is enabled by the integration of thermally stable metal-nitride gate electrodes.
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公开(公告)号:US09825712B2
公开(公告)日:2017-11-21
申请号:US15211503
申请日:2016-07-15
申请人: Ian F. Akyildiz , Josep M. Jornet
发明人: Ian F. Akyildiz , Josep M. Jornet
IPC分类号: H01L29/66 , H04B10/90 , H01L29/49 , H01L23/58 , H01L23/14 , H01L29/08 , H01L29/778 , H01L29/20 , H01L29/205 , H01L29/16
CPC分类号: H04B10/90 , H01L23/14 , H01L23/58 , H01L29/0843 , H01L29/1606 , H01L29/20 , H01L29/2003 , H01L29/205 , H01L29/49 , H01L29/7786 , H01L29/7787
摘要: A communication system includes a two-dimensional array of a plurality of plasmonic nano-antennas. Each plasmonic nano-antenna supports a surface plasmon polariton wave. A plurality of communications elements each excite a corresponding one of the plasmonic nano-antennas, thereby causing a surface plasmon polariton wave that corresponds to a signal to form on each of the plasmonic nano-antennas.
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公开(公告)号:US20170330944A1
公开(公告)日:2017-11-16
申请号:US15581620
申请日:2017-04-28
发明人: Yannick BAINES , Julien Buckley
IPC分类号: H01L29/423 , H01L29/66 , H01L29/205 , H01L29/20 , H01L29/08 , H01L29/778 , H01L29/06
CPC分类号: H01L29/4236 , H01L29/0649 , H01L29/0843 , H01L29/1033 , H01L29/2003 , H01L29/205 , H01L29/42356 , H01L29/66462 , H01L29/7786 , H01L29/7787
摘要: The invention relates to a normally-off high-electron-mobility field-effect transistor (1), comprising: a superposition of a first layer of semiconductor material (15) and a second layer of semiconductor material (16) so as form an electron gas layer (17) at the interface between these first and second layers; a trench (5) separating the superposition into first and second domains (51, 52); an insulating element (34) positioned in said trench in order to electrically insulate said first and second domains; a p-doped semiconductor element (33) in contact with the first or the second layer of semiconductor material (16) of the first and second domains (51, 52), and extending continuously between the first and second domains; a gate insulator (32) positioned on the semiconductor element (33); a gate electrode (31) positioned on the gate insulator (32).
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