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1.发明授权Process for testing the resistance of an integrated circuit to a side channel analysis 有权用于测试集成电路的电阻到侧面通道分析的过程公开(公告)号：US08457919B2
公开(公告)日：2013-06-04
申请号：US12750846
申请日：2010-03-31
IPC分类号： G01R27/28
CPC分类号： G06F21/556 , G06F7/723 , G06F21/75 , G06F2207/7219 , G09C1/00 , H04L9/003 , H04L9/005 , H04L9/302
摘要： A process for testing an integrated circuit includes collecting a set of points of a physical property while the integrated circuit is executing a multiplication, dividing the set of points into a plurality subsets of lateral points, calculating an estimation of the value of the physical property for each subset, and applying to the subset of lateral points a step of horizontal transversal statistical processing by using the estimations of the value of the physical property, to verify a hypothesis about the variables manipulated by the integrated circuit.
摘要翻译： 一种用于测试集成电路的过程包括在集成电路正在执行乘法时收集物理特性的一组点，将该点集合划分成多个侧向点子集，计算物理属性值的估计 并且通过使用物理属性的值的估计来应用横向点的横向横向统计处理的步骤，以验证关于由集成电路操纵的变量的假设。
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公开(公告)号：US20130055025A1
公开(公告)日：2013-02-28
申请号：US13591656
申请日：2012-08-22
申请人： Benoît FEIX , Georges GAGNEROT
发明人： Benoît FEIX , Georges GAGNEROT
IPC分类号： G06F11/28
CPC分类号： G06F21/554 , G06F21/78
摘要： A microprocessor including a memory and a central processing unit configured to sign a binary word written in the memory, and during the reading of a binary word in the memory, verify the signature of the binary word and, if the signature is invalid, launching a protective action of the memory. According to the invention, the central processing unit is configured to execute a write instruction of a binary word accompanied by an invalid signature in a memory zone, so that a later read of the memory zone by the central processing unit launches the protective action.
摘要翻译： 一种包括存储器和中央处理单元的微处理器，被配置为对存储器中写入的二进制字进行签名，并且在读取存储器中的二进制字时，验证二进制字的签名，并且如果签名无效，则启动一个 记忆的保护动作。 根据本发明，中央处理单元被配置为在存储器区域中执行伴有无效签名的二进制字的写入指令，使得由中央处理单元稍后读取存储器区域启动保护动作。
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公开(公告)号：US08572406B2
公开(公告)日：2013-10-29
申请号：US12750953
申请日：2010-03-31
IPC分类号： G09F21/00
CPC分类号： G06F21/75 , G06F7/723 , G06F2207/7252 , G09C1/00 , H04L9/003 , H04L2209/08 , H04L2209/12
摘要： An integrated circuit including a multiplication function configured to execute a multiplication operation of two binary words x and y including a plurality of basic multiplication steps of components xi of word x by components yj of word y is described. The multiplication function of the integrated circuit is configured to execute two successive multiplications by modifying, in a random or pseudo-random manner, an order in which the basic multiplication steps of components xi by components yj are executed.
摘要翻译： 描述了包括乘法函数的集成电路，其被配置为通过词y的分量yj执行包括单词x的分量xi的多个基本乘法步长的两个二进制字x和y的乘法运算。 集成电路的乘法功能被配置为通过以随机或伪随机方式修改由分量yj执行分量xi的基本乘法步骤的顺序来执行两个连续乘法。
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4.发明申请PROCESS FOR TESTING THE RESISTANCE OF AN INTEGRATED CIRCUIT TO A SIDE CHANNEL ANALYSIS 有权将集成电路的电阻测试到侧面通道分析的过程公开(公告)号：US20110246119A1
公开(公告)日：2011-10-06
申请号：US12750846
申请日：2010-03-31
CPC分类号： G06F21/556 , G06F7/723 , G06F21/75 , G06F2207/7219 , G09C1/00 , H04L9/003 , H04L9/005 , H04L9/302
摘要： A process for testing an integrated circuit includes collecting a set of points of a physical property while the integrated circuit is executing a multiplication, dividing the set of points into a plurality subsets of lateral points, calculating an estimation of the value of the physical property for each subset, and applying to the subset of lateral points a step of horizontal transversal statistical processing by using the estimations of the value of the physical property, to verify a hypothesis about the variables manipulated by the integrated circuit.
摘要翻译： 一种用于测试集成电路的过程包括在集成电路正在执行乘法时收集物理特性的一组点，将该点集合划分成多个侧向点子集，计算物理属性值的估计 并且通过使用物理属性的值的估计来应用横向点的横向横向统计处理的步骤，以验证关于由集成电路操纵的变量的假设。
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公开(公告)号：US20120221618A1
公开(公告)日：2012-08-30
申请号：US13403285
申请日：2012-02-23
CPC分类号： G06F7/723 , G06F7/5235 , G06F2207/7261
摘要： A method and a device protected against hidden channel attacks includes a calculation of the result of the exponentiation of a data m by an exponent d. The method and the device are configured to execute only multiplications of identical large variables, by breaking down any multiplication of different large variables x, y into a combination of multiplications of identical large variables.
摘要翻译： 防止隐藏信道攻击的方法和设备包括以指数d计算数据m的求幂的结果。 该方法和装置被配置为仅通过将不同大变量x，y的任何乘法分解为相同大变量的乘法的组合来执行相同大变量的乘法。
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公开(公告)号：US20110246789A1
公开(公告)日：2011-10-06
申请号：US12750953
申请日：2010-03-31
CPC分类号： G06F21/75 , G06F7/723 , G06F2207/7252 , G09C1/00 , H04L9/003 , H04L2209/08 , H04L2209/12
摘要： An integrated circuit including a multiplication function configured to execute a multiplication operation of two binary words x and y including a plurality of basic multiplication steps of components xi of word x by components yj of word y is described. The multiplication function of the integrated circuit is configured to execute two successive multiplications by modifying, in a random or pseudo-random manner, an order in which the basic multiplication steps of components xi by components yj are executed.
摘要翻译： 描述了包括乘法函数的集成电路，其被配置为通过词y的分量yj执行包括单词x的分量xi的多个基本乘法步长的两个二进制字x和y的乘法运算。 集成电路的乘法功能被配置为通过以随机或伪随机方式修改由分量yj执行分量xi的基本乘法步骤的顺序来执行两个连续乘法。
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