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公开(公告)号：US07910922B2
公开(公告)日：2011-03-22
申请号：US12854654
申请日：2010-08-11
IPC分类号： H01L29/04
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US20090230448A1
公开(公告)日：2009-09-17
申请号：US12433529
申请日：2009-04-30
IPC分类号： H01L27/108
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US07550763B2
公开(公告)日：2009-06-23
申请号：US11808808
申请日：2007-06-13
IPC分类号： H01L23/58
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US20110140185A1
公开(公告)日：2011-06-16
申请号：US13032009
申请日：2011-02-22
IPC分类号： H01L27/06 , H01L27/108
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US20070241330A1
公开(公告)日：2007-10-18
申请号：US11808808
申请日：2007-06-13
IPC分类号： H01L23/48
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）之类的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近， 凸起电极（208）不被设置。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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6.发明授权Semiconductor integrated circuit device having particular testing pad arrangement 有权具有特定测试垫布置的半导体集成电路器件公开(公告)号：US07247879B2
公开(公告)日：2007-07-24
申请号：US10873360
申请日：2004-06-23
IPC分类号： H01L29/04
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）之类的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近， 凸起电极（208）不被设置。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US08629481B2
公开(公告)日：2014-01-14
申请号：US13032009
申请日：2011-02-22
IPC分类号： H01L23/52
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US07910960B2
公开(公告)日：2011-03-22
申请号：US12433529
申请日：2009-04-30
IPC分类号： H01L23/52
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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公开(公告)号：US20100301334A1
公开(公告)日：2010-12-02
申请号：US12854654
申请日：2010-08-11
IPC分类号： H01L23/48
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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10.发明授权Semiconductor integrated circuit device having bump electrodes for signal or power only, and testing pads that are not coupled to bump electrodes 有权具有仅用于信号或功率的凸起电极的半导体集成电路器件，以及不耦合到凸块电极的测试焊盘公开(公告)号：US06831294B1
公开(公告)日：2004-12-14
申请号：US09869274
申请日：2001-06-26
IPC分类号： H01L2904
CPC分类号： H01L22/32 , G01R31/2884 , G01R31/31713 , H01L2224/02379 , H01L2224/0392 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.
摘要翻译： 在半导体集成电路器件中，使用诸如重定位布线层（205）的导电层的测试焊盘（209b）位于仅用于探针检查的接合焊盘（202b）的正上方或附近，在这些端子处，凸起电极 （208）。 甚至可以提供类似的测试焊盘相对于诸如具有凸起电极的焊盘的端子。 通过使用这些测试垫或者在与测试垫一起形成凸块电极的组合使用底部凸点冶金来执行探针测试。 根据上述，由于使用了测试垫，因此可能不会添加专用于探针测试的焊盘的凸起电极。 此外，使用设置在诸如接合焊盘的端子附近的测试焊盘并且尺寸小于凸块下的金属，使得能够在重新定位布线处理之后执行探针测试。
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