公开(公告)号：US08694816B2

公开(公告)日：2014-04-08

申请号：US12356313

申请日：2009-01-20

申请人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

发明人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

IPC分类号： G06F1/26

CPC分类号： G06F1/28

摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.

摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。

公开(公告)号：US07523337B2

公开(公告)日：2009-04-21

申请号：US10922050

申请日：2004-08-19

申请人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

发明人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

IPC分类号： G06F1/26

CPC分类号： G06F1/28

摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.

摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。

公开(公告)号：US20060041763A1

公开(公告)日：2006-02-23

申请号：US10922050

申请日：2004-08-19

申请人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

发明人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

IPC分类号： G06F1/26

CPC分类号： G06F1/28

摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.

摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。

公开(公告)号：US20090199033A1

公开(公告)日：2009-08-06

申请号：US12356313

申请日：2009-01-20

申请人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

发明人： Shekhar Borkar ,  Tanay Karnik ,  Peter Hazucha ,  Gerhard Schrom ,  Greg Dermer

IPC分类号： G06F1/26

CPC分类号： G06F1/28

摘要： A system is disclosed. The system includes a load, a voltage regulator circuit coupled to the load a power supply, a load coupled to the power supply to receive one or more voltages from the power supply, and a digital bus, coupled between the power supply and the load. The digital bus transmits power consumption measurements from the load to the power supply and transmits power consumption measurements from the power supply to the load.

摘要翻译： 公开了一种系统。 该系统包括负载，电压调节器电路，耦合到负载电源，耦合到电源以从电源接收一个或多个电压的负载以及耦合在电源和负载之间的数字总线。 数字总线将功耗测量从负载传输到电源，并将功耗测量从电源传输到负载。

公开(公告)号：US5701420A

公开(公告)日：1997-12-23

申请号：US744123

申请日：1996-11-05

申请人： David J. Nedwek ,  Howard Wilson ,  Steve Nugent ,  Greg Dermer

发明人： David J. Nedwek ,  Howard Wilson ,  Steve Nugent ,  Greg Dermer

IPC分类号： G06F15/173 ,  G06F15/16

CPC分类号： G06F15/17343

摘要： A method for configuring a plurality of configurable components within a computer system. The method includes the step of asserting a RESET signal for all of the configurable components. The RESET signal is asserted by a diagnostic processor within the system. The components each respond with an ERROR # signal which provides an indication to the diagnostic processor that the component is in an inactive state. After a predetermined number of clock signals the diagnostic processor configures a first component, then a second component and so forth and so on, until all of the components are configured. After all of the components are configured, the diagnostic processor deasserts the RESET signal for the first component, then deasserts the RESET signal for the second component and so forth and so on, until all of the RESET signals have been deasserted. Each component deasserts the ERROR # signal upon the deassertion of the RESET signal. The diagnostic processor allows normal operation to occur upon the deassertion of all the ERROR # signals.

摘要翻译： 一种用于在计算机系统内配置多个可配置组件的方法。 该方法包括为所有可配置组件确定RESET信号的步骤。 RESET信号由系统内的诊断处理器确定。 每个组件以ERROR＃信号进行响应，该信号向诊断处理器提供组件处于非活动状态的指示。 在预定数量的时钟信号之后，诊断处理器配置第一组件，然后配置第二组件等等，直到配置所有组件。 在配置了所有组件之后，诊断处理器将第一个组件的RESET信号置为无效，然后取消对第二个组件的RESET信号等等，直到所有的RESET信号都被置为无效。 每个组件在RESET信号的取消状态时取消断开ERROR＃信号。 诊断处理器允许正常操作发生在所有ERROR＃信号消除时。