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公开(公告)号：US20250046224A1
公开(公告)日：2025-02-06
申请号：US18924166
申请日：2024-10-23
Inventor： Xuehuan Feng , Yongqian Li
Abstract: A shift-register unit circuit includes a first input sub-circuit configured to have a display-input terminal to receive a display-input signal, and to provide a display output-control signal to a first node; a second input sub-circuit configured to have a blank-input terminal to receive a blank-input signal for charging a blank-control node, and to provide a blank output-control signal to the first node, wherein the second input sub-circuit includes an isolation sub-circuit, wherein the isolation sub-circuit is set between the first node and the blank-control node; an output sub-circuit configured to output signal under control of the first node; and an anti-leak sub-circuit configured to provide a working voltage level to an anti-leak connection point. The anti-leak sub-circuit includes a second anti-leak transistor connected to the isolation sub-circuit.
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公开(公告)号：USRE50290E1
公开(公告)日：2025-02-04
申请号：US17889180
申请日：2022-08-16
Inventor： Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3258 , G11C19/28
Abstract: A shift register is provided, which includes a blanking input circuit, a blanking control circuit, a blanking pull-down circuit, and a shift register circuit, and a twenty-ninth transistor. The blanking input circuit may provide a blanking input signal to a first control node according to a second clock signal. and comprise a first transistor The blanking control circuit may provide a first clock signal to a second control node and maintain a voltage difference between the first control node and the second control node, according to a voltage of the first control node. comprise a second transistor. The blanking pull-down circuit may provide a voltage of the second control node to a pull-down node according to the a first clock signal and comprise a third transistor and a third leakage-preventative transistor. The shift register circuit may provide a shift signal via a shift signal output terminal and a first drive signal via a first drive signal output terminal according to a voltage of the pull-down node.
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公开(公告)号：US12216347B2
公开(公告)日：2025-02-04
申请号：US18021185
申请日：2022-03-28
Inventor： Yong Ma , Haifeng Xu , Xiaochun Shi , Jinfeng Zhang , Tao Liu
IPC: G02F1/1333 , F21V8/00
Abstract: A backlight module includes a back plate, a plastic frame disposed on one side of the back plate and connected with the back plate, a light source assembly located on an inner side of the plastic frame, and a reflective sheet, a light guide plate, and an optical membrane group sequentially stacked and located on the inner side of the plastic frame; the light source assembly includes a circuit board and a light source disposed on a first side surface of the circuit board, and the light source is located at a first side edge of the light guide plate; the light guide plate includes a first surface facing the reflective sheet and a second surface facing away from the reflective sheet; a first rectangular annular step and a second rectangular annular step are provided on an end face of the plastic frame facing the back plate.
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公开(公告)号：US12185452B2
公开(公告)日：2024-12-31
申请号：US17802990
申请日：2021-08-11
Inventor： Rui Wang , Zejun Chen , Jianjun Wang , Xiaoshi Liu , Xianfeng Yuan
IPC: H05K1/02 , G02F1/13357
Abstract: The present disclosure is related to a display device and a circuit board (200). The display device comprises a light-emitting module (100), a circuit board (200) and a conductive structure (300). The surface of the light-emitting module (100) is provided with a conductive portion (101). The circuit board (200) is arranged on a back face (102) of the light-emitting module (100), and has a first surface (201) close to the light-emitting module (100). The first surface (201) of the circuit board (200) is provided with an exposed external conductive layer (210), and the external conductive layer (210) is electrically connected to a ground wire of the circuit board (200). The conductive structure (300) is located between the circuit board (200) and the light-emitting module (100), and makes the external conductive layer (210) electrically connect to the conductive portion (101).
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公开(公告)号：US20240427183A1
公开(公告)日：2024-12-26
申请号：US18290762
申请日：2022-07-29
Inventor： Ran ZHANG , Yongxian XIE , Chengshao YANG , Xiaoye MA , Yongcan WANG , Fengzhen LV , Zhiwei DING
IPC: G02F1/1333 , G02F1/1339 , G02F1/1343 , G02F1/1345 , G02F1/1368
Abstract: A liquid crystal writing screen, including: first substrate and second substrates, and a bistable liquid crystal layer between the first and second substrates, where the first substrate includes: a first base substrate; a plurality of pixel units on a side of the first base substrate proximate to the second substrate, each pixel unit including a thin film transistor, and a pixel electrode electrically connected to a first electrode of the thin film transistor; a passivation layer on a side of the thin film transistor distal from the first base substrate and in contact with the thin film transistor; where the pixel electrode is between the first base substrate and the passivation layer; and a spacer on a side of the passivation layer distal from the first base substrate and in contact with the passivation layer. A method for preparing the liquid crystal writing screen is further provided.
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Patent Agency Ranking
公开(公告)号：US20240412707A1
公开(公告)日：2024-12-12
申请号：US18695988
申请日：2023-07-31
Inventor： Ruifang Du , Ya Yu , Haijiao Qian , Xiaoye Ma
IPC: G09G3/36
Abstract: A display baseplate includes a display region and a peripheral region, and the display baseplate includes: a substrate, and a gate line driving circuit, a plurality of signal lines, and a gate line provided on one side of the substrate, the gate line driving circuit and the plurality of signal lines all being located in the peripheral region, and the gate line being located in the display region. The gate line driving circuit is respectively connected to the plurality of signal lines and the gate line, and includes a plurality of stages of driving units that are cascaded to each other, each driving unit includes a first element group, and the first element group includes at least one first electronic element. The plurality of signal lines are arranged in a first direction, the first direction is an extending direction of the gate line.
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公开(公告)号：US12158660B2
公开(公告)日：2024-12-03
申请号：US18272568
申请日：2021-02-07
Inventor： Haifeng Xu , Kaiwen Wang
IPC: G02F1/13357 , G02F1/1335
Abstract: An optical membrane, a backlight module and a display device are disclosed. The optical membrane includes a membrane body and at least two lugs, and the lugs are connected to two opposite sides of the membrane body and form an integral structure with the membrane body. Grooves are provided in connection lines between the lugs and the membrane body, and the grooves extend along the connection lines.
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公开(公告)号：US20240389383A1
公开(公告)日：2024-11-21
申请号：US17914516
申请日：2021-11-22
Inventor： Yongchao HUANG , Qinghe WANG , Leilei CHENG , Tongshang SU , Jun LIU , Chao WANG , Jun CHENG , Liangchen YAN
IPC: H10K59/121 , H10K59/131 , H10K59/80
Abstract: A display panel includes a base substrate, and pixel driving circuits disposed on the base substrate. A pixel driving circuit in the pixel driving circuits includes a driving transistor and a capacitor. A gate of the driving transistor is farther from the base substrate than an active layer of the driving transistor. An active portion of the active layer includes edges that are flush with respective edges of the gate. A first electrode plate of the capacitor is coupled to the gate of the driving transistor. A second electrode plate of the capacitor is disposed on a side of the gate away from the base substrate, and is able to shield light. Orthographic projections, on the base substrate, of the edges of the active portion that are flush with respective edges of the gate are located within an orthographic projection of the
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公开(公告)号：US20240387514A1
公开(公告)日：2024-11-21
申请号：US18272123
申请日：2022-07-29
Inventor： Jun WANG , Jun CHENG , Haitao WANG , Tongshang SU , Yongchao HUANG , Jingang FANG , Liu ZHANG , Shengli LIU
Abstract: The present disclosure provides a display substrate, a manufacturing method thereof and a display device. The display substrate includes a base substrate, a plurality of groups of scanning lines extending along a first direction and arranged along a second direction, and a reference signal line extending along the second direction at an end of each scanning line, and an orthogonal projection of the reference signal line onto the base substrate does not overlap with an orthogonal projection of each scanning line onto the base substrate. The scanning lines include a target scanning line for discharging static electricity and including an electrostatic discharge end arranged at a side of the target scanning line close to the reference signal line, the display substrate further includes an electrostatic discharge structure electrically coupled to the electrostatic discharge end and an electrostatic ring and arranged between the electrostatic discharge end and the reference signal line.
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公开(公告)号：US12148404B2
公开(公告)日：2024-11-19
申请号：US18395828
申请日：2023-12-26
Inventor： Rui Ma , Xiaoye Ma , Xianjie Shao , Ruifang Du
IPC: G09G3/32 , G09G3/3266 , G09G3/36 , G11C19/28 , G02F1/1345
Abstract: A display substrate and a display device are disclosed. The display substrate includes a base substrate and a plurality of shift register units; each of the plurality of shift register units includes an input circuit, an output circuit, a first reset circuit and a frame reset signal connection wire; the frame reset signal connection wire and is configured to provide a frame reset signal to the first reset circuit; the first reset circuit is configured to respond to the frame reset signal, so as to reset a first node and an output end within a time period between two display frames of the display substrate; the first reset circuit includes a first transistor and a second transistor, and the frame reset signal connection wire, a gate of the first transistor and a gate of the second transistor are provided on a first conductive layer.
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