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公开(公告)号:US12087198B2
公开(公告)日:2024-09-10
申请号:US18342953
申请日:2023-06-28
发明人: Xuehuan Feng , Yongqian Li
CPC分类号: G09G3/20 , G11C19/28 , G09G2310/0267 , G09G2310/0286 , G09G2310/061
摘要: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.
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公开(公告)号:US11842689B2
公开(公告)日:2023-12-12
申请号:US17619829
申请日:2021-02-09
发明人: Yongqian Li , Xuehuan Feng
IPC分类号: G09G3/3258 , G09G3/3233
CPC分类号: G09G3/3258 , G09G3/3233 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2310/0202 , G09G2310/0251 , G09G2310/08 , G09G2320/0233 , G09G2320/0257 , G09G2320/043 , G09G2320/045 , G09G2330/021
摘要: A pixel circuit, a driving method of pixel circuit, and a display device are provided. The pixel circuit includes: a light emitting device, a driving sub-circuit, an energy storage sub-circuit, a data writing sub-circuit and a pull-down sub-circuit; the data writing sub-circuit is configured to control a voltage signal on a data line to be written into a control end of the driving sub-circuit in response to a data writing control signal; a first end of the driving sub-circuit is electrically connected to a target node, a second end of the driving sub-circuit is electrically connected to a power supply voltage, and the driving sub-circuit is configured to control a conduction of the driving sub-circuit under a control of a voltage on a control end of the driving sub-circuit.
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公开(公告)号:US11769457B2
公开(公告)日:2023-09-26
申请号:US17860347
申请日:2022-07-08
发明人: Xuehuan Feng , Yongqian Li
IPC分类号: G09G3/3266
CPC分类号: G09G3/3266 , G09G2310/0286
摘要: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a banking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node, wherein the composite output signal includes a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
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公开(公告)号:US11538380B2
公开(公告)日:2022-12-27
申请号:US16621734
申请日:2019-03-25
发明人: Xuehuan Feng
IPC分类号: G11C19/28 , G09G3/36 , G09G3/20 , G11C19/18 , G09G3/3266
摘要: A shift register, a driving method therefor, a gate driving circuit and a display device. The shift register comprises: an input module, a first reset module, a second reset module, an output module. The input module is configured to write input signal of a signal input terminal STU into second node Q2 through second clock signal terminal CLKB, and to connect Q2 with first node Q1 through STU. The first reset module is configured to write signal of first direct current signal terminal into third node Q3 through STU, and to write reset signal of reset signal terminal STD into Q3 and connect Q2 with Q1 through STD. The second reset module is configured to write a signal of the first direct current signal terminal into a signal output terminal OUT through Q3. The output module is configured to write a first clock signal of CLKA into OUT through Q1.
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公开(公告)号:US11450252B2
公开(公告)日:2022-09-20
申请号:US16478395
申请日:2018-12-21
发明人: Xuehuan Feng , Yongqian Li
摘要: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.
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公开(公告)号:US11361693B2
公开(公告)日:2022-06-14
申请号:US16633965
申请日:2019-07-10
发明人: Xuehuan Feng , Yongqian Li
摘要: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes a first input circuit, an output control circuit, and an output circuit. The first input circuit is configured to output a first input signal to a first node in response to a first control signal; the output control circuit is configured to output an output control signal to a second node under control of a level of the first node; and the output circuit includes an output terminal, and the output circuit is configured to output an output signal to the output terminal under control of a level of the second node.
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公开(公告)号:US11348531B2
公开(公告)日:2022-05-31
申请号:US16772958
申请日:2019-11-05
发明人: Xuehuan Feng , Yongqian Li
IPC分类号: G09G3/3225 , G09G3/3266 , G11C19/28
摘要: The present disclosure provides a shift register unit, including a detection signal input sub-circuit, a display signal input sub-circuit, an output circuit, a pull-down control circuit and a signal output terminal, the output circuit includes a pull-up sub-circuit and a pull-down sub-circuit, the pull-down control circuit includes a selection sub-circuit and a plurality of pull-down control sub-circuits. The present disclosure further provides a gate driving circuit, a display panel and a driving method for driving the display panel. The shift register unit has a simple structure and a long service life.
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公开(公告)号:US11222565B2
公开(公告)日:2022-01-11
申请号:US16072049
申请日:2018-01-08
发明人: Xuehuan Feng , Xing Zhang , Qi Hu , Pan Xu , Yongqian Li , Meng Li , Zhidong Yuan , Zhenfei Cai , Can Yuan
摘要: The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.
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公开(公告)号:US11217181B2
公开(公告)日:2022-01-04
申请号:US16068489
申请日:2017-11-21
发明人: Mengyu Luan , Xuehuan Feng , Xinfeng Wu , Youyuan Hu , Fei Li , Xinzhu Wang , Huihui Li , Qi Hu
IPC分类号: G09G3/3291 , G09G3/3258
摘要: The present application provides a pixel compensation circuit, a method for driving the same, and a display apparatus. The pixel compensation circuit includes a light emitting element, a current control sub-circuit and a reverse bias sub-circuit. The current control sub-circuit is coupled to a first terminal of the light emitting element and is configured to control current flowing between a first terminal and a second terminal of the light emitting element. The reverse bias sub-circuit is coupled to a first control signal line and a second terminal of the light emitting element respectively. The reverse bias sub-circuit is configured to set the second terminal of the light emitting element to be at a first bias voltage under the control of a signal on the first control signal line, so that the light emitting element is maintained in a reverse bias state.
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公开(公告)号:US11176871B2
公开(公告)日:2021-11-16
申请号:US16623018
申请日:2018-12-14
发明人: Xuehuan Feng , Yongqian Li
摘要: A shift register unit, a driving method thereof, a gate driving circuit and a display device. The shift register unit includes a blanking input circuit, a display input circuit, an output circuit, a first control circuit and a second control circuit. The blanking input circuit inputs a blanking pull-up signal to a first node according to a blanking input signal; the display input circuit inputs a display pull-up signal to the first node in response to a display input signal; the output circuit outputs an composite output signal to an output terminal under the control of the first node; the first control circuit controls a level of a second node under the control of the first node; and the second control circuit controls the level of the second node in response to a blanking pull-down control signal.
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