摘要:
The present invention relates to an oscillator arrangement, arranged for providing an oscillator output and phase noise detection and/or control of said oscillator output, the arrangement comprising a mixer (1) connected to a low-pass filter (2). The oscillator arrangement comprises a first oscillator (7) and a second oscillator (8), where the oscillators (7, 8) are inter-injection locked to each other by means of at least one coupling element (Q) in such a way that the oscillator output is acquired in quadrature automatically. The present invention also relates to a corresponding method.
摘要:
In a voltage controlled oscillator circuit comprising two transistors, the first terminals of each said two transistors, are coupled together and to a supply voltage, two interconnected resonator units, and each of said two resonator units couples a respective second terminal of said two transistors to third terminals of both said transistors.
摘要:
The invention discloses a tuneable resonator (100, 200, 300, 500, 600, 700, 900) with a substrate layer (140, 260, 360, 560, 660, 960), which substrate layer supports a structure with a first electrode (130, 240, 350, 550, 650). In connection to the first electrode there is arranged a layer (120, 230, 330, 530, 630, 930) of a material which can be brought to resonate. The resonator further comprises a second electrode (110, 210, 310, 510, 610, 710, 910) arranged in connection to said material which can be brought to resonate, and the material which can be brought to resonate is a ferroelectric material. The ferroelectric material is brought into resonance by applying an electrical field (DC, AC) between the first and the second electrode, the tuning being achieved by varying the electrical field.
摘要:
The present invention relates to a tunable circuit, or admittance, arrangement comprising at least one capacitive branch with at least a tunable first capacitor, and tuning application means. It further comprises at least one resonant branch comprising at least a second capacitor and an inductor, said second capacitor and said inductor being connected in series. Said at least one capacitive branch and said at least one resonant branch are connected in parallel, and said tuning application means are adapted for application of a DC tuning voltage. The capacitance of said first and/or second capacitor and/or the inductance of said inductor are selected such that the frequency dependency of the tunability of a varactor arrangement forming the equivalent varactor arrangement of the admittance arrangement can be controlled at least in a selected frequency range.
摘要:
The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.
摘要:
The invention discloses a device for multiplying the pulse frequency of a signal, a pulse train, comprising input means for the signal and means for accessing the signal at points with a predetermined phase difference between them. The device additionally comprises means at a first level for combining accessed signal pairs, with one and the same phase distance within all the combined pairs, the output from each first level combining means being a pulse train. The device additionally comprises combining means at a second level for combining the pulse trains from the first level, and the combining means at the first level are such that the pulses in their output pulse trains have rise flanks which always coincide with the rise flank of the first signal in the combined accessed signal pairs, and fall flanks which always coincide with the fall flanks of the second signal in said pair.
摘要:
The present invention relates to a multilayer, balanced-unbalanced signal transformer (20) comprising a first coil and a second coil providing at least one balanced signal port at one side of the balun transformer and an unbalanced signal port at another side of the balun transformer. The (at least one) balanced signal port is provided by a first balanced signal terminal (23b) and a second balanced signal terminal (24b) formed by the ends of the first coil. The unbalanced (single-ended) signal port is provided by a first unbalanced signal terminal (21u) and a second unbalanced signal terminal (22u). It comprises a discrete component formed on a low resistivity, e.g. semiconductor substrate layer, and the first and second coils are formed in, or constitute, a first and a second metal layer such that at least a portion of one of the coils is disposed in a metal layer, or constitute a portion of a metal layer, above the metal layer in which at least a portion of the other coil is disposed, or which is constituted, at least partly, by a portion of the other coil, wherein between said first and second metal layer and between said second metal layer and the substrate layer, first and second dielectric layers are disposed. Each of said first and second coils comprises three or less winding turns.
摘要:
In a voltage controlled oscillator circuit comprising two transistors, the first terminals of each said two transistors, are coupled together and to a supply voltage, two interconnected resonator units, and each of said two resonator units couples a respective second terminal of said two transistors to third terminals of both said transistors.
摘要:
The present invention relates to a tunable circuit, or admittance, arrangement comprising at least one capacitive branch with at least a tunable first capacitor, and tuning application means. It further comprises at least one resonant branch comprising at least a second capacitor and an inductor, said second capacitor and said inductor being connected in series. Said at least one capacitive branch and said at least one resonant branch are connected in parallel, and said tuning application means are adapted for application of a DC tuning voltage. The capacitance of said first and/or second capacitor and/or the inductance of said inductor are selected such that the frequency dependency of the tunability of a varactor arrangement forming the equivalent varactor arrangement of the admittance arrangement can be controlled at least in a selected frequency range.
摘要:
The present invention relates to a multiband PLL arrangement comprising a single loop PLL with a phase/frequency detecting means (1), a loop filter means (2) and a Voltage Controlled Oscillator (VCO) (3), to which PLL a reference voltage signal (Vref) is input. It further comprises a control circuit for appropriately locking the VCO (3) to the correct frequency band, said control circuit comprising a multi-window circuit (4) with at least first and second window amplitudes each defined by respective upper and lower voltage levels, and comparing means (5A, 5B) are provided for comparing a first VCO control voltage output from the loop filter means (2) with the upper and lower voltage levels of a first, broadest amplitude window. If the VCO control voltage settles within said first amplitude window, a narrower window is selected, the voltage levels of which are compared with the VCO control voltage and if the VCO control voltage settles within that or a further subsequent, smaller amplitude window, phase lock is achieved, otherwise, if the VCO control voltage does not settle within said windows, this is established by the comparing means (5A, 5B), said comparing means (5A, 5B) providing a signal for providing a second control signal to the VCO (3) for switching it to another, higher or lower, frequency band. For said other frequency band, the resulting first VCO control voltage signal is compared with said first amplitude window etc. until phase lock is achieved in the appropriate frequency band.