Oscillator arrangement
    1.
    发明授权
    Oscillator arrangement 有权
    振荡器布置

    公开(公告)号:US08525604B2

    公开(公告)日:2013-09-03

    申请号:US12665183

    申请日:2007-06-20

    IPC分类号: H03K3/282

    摘要: The present invention relates to an oscillator arrangement, arranged for providing an oscillator output and phase noise detection and/or control of said oscillator output, the arrangement comprising a mixer (1) connected to a low-pass filter (2). The oscillator arrangement comprises a first oscillator (7) and a second oscillator (8), where the oscillators (7, 8) are inter-injection locked to each other by means of at least one coupling element (Q) in such a way that the oscillator output is acquired in quadrature automatically. The present invention also relates to a corresponding method.

    摘要翻译: 振荡器装置技术领域本发明涉及一种振荡器装置,其被配置为提供振荡器输出和所述振荡器输出的相位噪声检测和/或控制,该装置包括连接到低通滤波器(2)的混频器(1)。 振荡器装置包括第一振荡器(7)和第二振荡器(8),其中通过至少一个耦合元件(Q)将振荡器(7,8)互相注入彼此锁定,使得 振荡器输出自动获取正交。 本发明还涉及相应的方法。

    Tuneable resonator
    3.
    发明授权
    Tuneable resonator 有权
    可调谐谐振器

    公开(公告)号:US07548142B2

    公开(公告)日:2009-06-16

    申请号:US11573312

    申请日:2004-07-06

    IPC分类号: H03B5/32 H03H3/02 H03H9/17

    摘要: The invention discloses a tuneable resonator (100, 200, 300, 500, 600, 700, 900) with a substrate layer (140, 260, 360, 560, 660, 960), which substrate layer supports a structure with a first electrode (130, 240, 350, 550, 650). In connection to the first electrode there is arranged a layer (120, 230, 330, 530, 630, 930) of a material which can be brought to resonate. The resonator further comprises a second electrode (110, 210, 310, 510, 610, 710, 910) arranged in connection to said material which can be brought to resonate, and the material which can be brought to resonate is a ferroelectric material. The ferroelectric material is brought into resonance by applying an electrical field (DC, AC) between the first and the second electrode, the tuning being achieved by varying the electrical field.

    摘要翻译: 本发明公开了一种具有衬底层(140,260,360,560,660,960)的可调谐谐振器(100,200,300,500,600,700,900),该衬底层支撑具有第一电极( 130,240,350,550,650)。 与第一电极相连,布置有能够引起共振的材料层(120,230,330,530,630,930)。 所述谐振器还包括与所述材料相连接设置的第二电极(110,210,310,510,610,710,910),所述第二电极可被引起谐振,并且可以引起谐振的材料是铁电材料。 铁电材料通过在第一和第二电极之间施加电场(DC,AC)而进入共振,通过改变电场来实现调谐。

    Method to Increase the Tuneability of Varactors
    4.
    发明申请
    Method to Increase the Tuneability of Varactors 失效
    增加变容二极管的可调性的方法

    公开(公告)号:US20080197947A1

    公开(公告)日:2008-08-21

    申请号:US11916583

    申请日:2005-09-06

    IPC分类号: H03J3/20 H03J7/08

    摘要: The present invention relates to a tunable circuit, or admittance, arrangement comprising at least one capacitive branch with at least a tunable first capacitor, and tuning application means. It further comprises at least one resonant branch comprising at least a second capacitor and an inductor, said second capacitor and said inductor being connected in series. Said at least one capacitive branch and said at least one resonant branch are connected in parallel, and said tuning application means are adapted for application of a DC tuning voltage. The capacitance of said first and/or second capacitor and/or the inductance of said inductor are selected such that the frequency dependency of the tunability of a varactor arrangement forming the equivalent varactor arrangement of the admittance arrangement can be controlled at least in a selected frequency range.

    摘要翻译: 本发明涉及一种包括至少一个具有至少一个可调谐的第一电容器的电容分支的调谐电路或导纳装置,以及调谐应用装置。 它还包括至少一个包括至少第二电容器和电感器的谐振支路,所述第二电容器和所述电感器串联连接。 所述至少一个电容性支路和所述至少一个谐振支路并联连接,所述调谐应用装置适用于施加直流调谐电压。 选择所述第一和/或第二电容器的电容和/或所述电感器的电感,使得形成导纳装置的等效变容二极管布置的变容二极管布置的可调谐性的频率依赖性至少可以被选择为频率 范围。

    Oscillator circuit with tuneable signal delay means
    5.
    发明授权
    Oscillator circuit with tuneable signal delay means 有权
    具有可调信号延迟装置的振荡电路

    公开(公告)号:US07352253B2

    公开(公告)日:2008-04-01

    申请号:US10581788

    申请日:2003-12-10

    IPC分类号: H03B27/00

    CPC分类号: H03B5/24 H03L7/0812

    摘要: The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

    摘要翻译: 本发明公开了一种振荡器电路(100,200,300,400),包括振荡元件(110,210,310,410)和用于从振荡电路输出振荡频率的输出装置(115,215,315,415) 。 电路还包括与振荡元件串联布置的信号延迟装置(120,220,320,420),并将输出信号反馈给振荡元件。 延迟装置是相对于其提供的延迟可调的(120,220,320,420)。 振荡元件可以是放大器或VCO,并且延迟装置可以是延迟锁定环路或可调延迟线路,这取决于本发明的实施例。

    Frequency multiplier
    6.
    发明申请
    Frequency multiplier 有权
    倍频器

    公开(公告)号:US20070159220A1

    公开(公告)日:2007-07-12

    申请号:US10581787

    申请日:2003-12-10

    IPC分类号: H03B19/00

    CPC分类号: G06F7/68

    摘要: The invention discloses a device for multiplying the pulse frequency of a signal, a pulse train, comprising input means for the signal and means for accessing the signal at points with a predetermined phase difference between them. The device additionally comprises means at a first level for combining accessed signal pairs, with one and the same phase distance within all the combined pairs, the output from each first level combining means being a pulse train. The device additionally comprises combining means at a second level for combining the pulse trains from the first level, and the combining means at the first level are such that the pulses in their output pulse trains have rise flanks which always coincide with the rise flank of the first signal in the combined accessed signal pairs, and fall flanks which always coincide with the fall flanks of the second signal in said pair.

    摘要翻译: 本发明公开了一种用于将信号的脉冲频率相乘的装置,脉冲串,其包括用于信号的输入装置和用于在它们之间具有预定相位差的点处访问信号的装置。 该装置还包括用于组合可访问信号对的第一级的装置,在所有组合对内具有相同的相位距离,每个第一级组合装置的输出是脉冲串。 该装置还包括用于组合来自第一电平的脉冲串的第二电平的组合装置,并且在第一电平处的组合装置使得它们的输出脉冲串中的脉冲具有总是与所述第一电平的上升侧面重合的上升侧面 组合的访问信号对中的第一信号和总是与所述对中的第二信号的下降侧面重合的下降侧面。

    Multilayer balun transformer structure

    公开(公告)号:US06603383B2

    公开(公告)日:2003-08-05

    申请号:US10036665

    申请日:2001-12-21

    IPC分类号: H01F500

    摘要: The present invention relates to a multilayer, balanced-unbalanced signal transformer (20) comprising a first coil and a second coil providing at least one balanced signal port at one side of the balun transformer and an unbalanced signal port at another side of the balun transformer. The (at least one) balanced signal port is provided by a first balanced signal terminal (23b) and a second balanced signal terminal (24b) formed by the ends of the first coil. The unbalanced (single-ended) signal port is provided by a first unbalanced signal terminal (21u) and a second unbalanced signal terminal (22u). It comprises a discrete component formed on a low resistivity, e.g. semiconductor substrate layer, and the first and second coils are formed in, or constitute, a first and a second metal layer such that at least a portion of one of the coils is disposed in a metal layer, or constitute a portion of a metal layer, above the metal layer in which at least a portion of the other coil is disposed, or which is constituted, at least partly, by a portion of the other coil, wherein between said first and second metal layer and between said second metal layer and the substrate layer, first and second dielectric layers are disposed. Each of said first and second coils comprises three or less winding turns.

    Method to increase the tuneability of varactors
    9.
    发明授权
    Method to increase the tuneability of varactors 有权
    增加变容二极管可调性的方法

    公开(公告)号:US07936235B2

    公开(公告)日:2011-05-03

    申请号:US11916583

    申请日:2005-06-09

    IPC分类号: H03H7/01

    摘要: The present invention relates to a tunable circuit, or admittance, arrangement comprising at least one capacitive branch with at least a tunable first capacitor, and tuning application means. It further comprises at least one resonant branch comprising at least a second capacitor and an inductor, said second capacitor and said inductor being connected in series. Said at least one capacitive branch and said at least one resonant branch are connected in parallel, and said tuning application means are adapted for application of a DC tuning voltage. The capacitance of said first and/or second capacitor and/or the inductance of said inductor are selected such that the frequency dependency of the tunability of a varactor arrangement forming the equivalent varactor arrangement of the admittance arrangement can be controlled at least in a selected frequency range.

    摘要翻译: 本发明涉及一种包括至少一个具有至少一个可调谐的第一电容器的电容分支的调谐电路或导纳装置,以及调谐应用装置。 它还包括至少一个包括至少第二电容器和电感器的谐振支路,所述第二电容器和所述电感器串联连接。 所述至少一个电容性支路和所述至少一个谐振支路并联连接,所述调谐应用装置适用于施加直流调谐电压。 选择所述第一和/或第二电容器的电容和/或所述电感器的电感,使得形成导纳装置的等效变容二极管布置的变容二极管布置的可调谐性的频率依赖性至少可以被选择为频率 范围。

    Multiband PLL arrangement and a method of controlling such arrangement
    10.
    发明授权
    Multiband PLL arrangement and a method of controlling such arrangement 失效
    多频带PLL布置和一种控制这种布置的方法

    公开(公告)号:US07738618B2

    公开(公告)日:2010-06-15

    申请号:US10595426

    申请日:2003-10-23

    IPC分类号: H03D3/24

    摘要: The present invention relates to a multiband PLL arrangement comprising a single loop PLL with a phase/frequency detecting means (1), a loop filter means (2) and a Voltage Controlled Oscillator (VCO) (3), to which PLL a reference voltage signal (Vref) is input. It further comprises a control circuit for appropriately locking the VCO (3) to the correct frequency band, said control circuit comprising a multi-window circuit (4) with at least first and second window amplitudes each defined by respective upper and lower voltage levels, and comparing means (5A, 5B) are provided for comparing a first VCO control voltage output from the loop filter means (2) with the upper and lower voltage levels of a first, broadest amplitude window. If the VCO control voltage settles within said first amplitude window, a narrower window is selected, the voltage levels of which are compared with the VCO control voltage and if the VCO control voltage settles within that or a further subsequent, smaller amplitude window, phase lock is achieved, otherwise, if the VCO control voltage does not settle within said windows, this is established by the comparing means (5A, 5B), said comparing means (5A, 5B) providing a signal for providing a second control signal to the VCO (3) for switching it to another, higher or lower, frequency band. For said other frequency band, the resulting first VCO control voltage signal is compared with said first amplitude window etc. until phase lock is achieved in the appropriate frequency band.

    摘要翻译: 本发明涉及一种多频带PLL装置,其包括具有相位/频率检测装置(1)的单环路PLL,环路滤波器装置(2)和压控振荡器(VCO)(3),PLL将参考电压 信号(Vref)被输入。 它还包括用于将VCO(3)适当地锁定到正确频带的控制电路,所述控制电路包括具有至少第一和第二窗幅度的多窗口电路(4),每个窗口振幅各自由相应的上和下电压电平限定, 并且提供比较装置(5A,5B),用于将从环路滤波器装置(2)输出的第一VCO控制电压与第一最宽幅度窗口的上和下电压电平进行比较。 如果VCO控制电压稳定在所述第一幅度窗口内,则选择较窄的窗口,其电压电平与VCO控制电压进行比较,并且如果VCO控制电压稳定在该或该后续的较小振幅窗口内,则锁相 否则,如果VCO控制电压不稳定在所述窗口内,则由比较装置(5A,5B)建立,所述比较装置(5A,5B)提供用于向VCO提供第二控制信号的信号 (3)用于将其切换到另一个较高或较低频带。 对于所述其他频带,将所得到的第一VCO控制电压信号与所述第一幅度窗口等进行比较,直到在适当的频带中实现相位锁定为止。