Output level voltage regulation
    1.
    发明申请
    Output level voltage regulation 有权
    输出电平稳压

    公开(公告)号:US20060273847A1

    公开(公告)日:2006-12-07

    申请号:US11221008

    申请日:2005-09-07

    IPC分类号: G05F1/10

    摘要: A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator output on the previous clock cycle, signals a state machine, which sends a clocked signal to a sense circuit and voltage regulator. The sense circuit may modify a resistance in a switched resistor network, such that the output level is incrementally stepped at clocked intervals towards the reference voltage until the polarity of the error signal reverses. When the output voltage crosses the reference voltage threshold, the comparator flips states and continues to regulate output pin voltage to the reference voltage level.

    摘要翻译: 电路将引脚输出电平适配到参考电平,其中数字比较器将来自器件的输出引脚的输出电压与参考电压电平进行比较。 比较器根据比较器输出的极性以及上一个时钟周期的比较器输出的注册极性,向状态机发出信号,该状态机将时钟信号发送到感测电路和稳压器。 感测电路可以修改开关电阻网络中的电阻,使得输出电平以朝向参考电压的时钟间隔逐步地步进,直到误差信号的极性反转。 当输出电压超过参考电压阈值时,比较器翻转状态并继续将输出引脚电压调节到参考电压电平。

    Output level voltage regulation
    2.
    发明授权
    Output level voltage regulation 有权
    输出电平稳压

    公开(公告)号:US07907002B2

    公开(公告)日:2011-03-15

    申请号:US11221008

    申请日:2005-09-07

    IPC分类号: G05F1/10

    摘要: A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator output on the previous clock cycle, signals a state machine, which sends a clocked signal to a sense circuit and voltage regulator. The sense circuit may modify a resistance in a switched resistor network, such that the output level is incrementally stepped at clocked intervals towards the reference voltage until the polarity of the error signal reverses. When the output voltage crosses the reference voltage threshold, the comparator flips states and continues to regulate output pin voltage to the reference voltage level.

    摘要翻译: 电路将引脚输出电平适配到参考电平,其中数字比较器将来自器件的输出引脚的输出电压与参考电压电平进行比较。 比较器根据比较器输出的极性以及上一个时钟周期的比较器输出的注册极性,向状态机发出信号,该状态机将时钟信号发送到感测电路和稳压器。 感测电路可以修改开关电阻网络中的电阻,使得输出电平以朝向参考电压的时钟间隔逐步地步进,直到误差信号的极性反转。 当输出电压超过参考电压阈值时,比较器翻转状态并继续将输出引脚电压调节到参考电压电平。