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公开(公告)号：US20130021106A1
公开(公告)日：2013-01-24
申请号：US13552704
申请日：2012-07-19
IPC分类号： H03L7/00
CPC分类号： G06F1/08
摘要： A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.
摘要翻译： 一种用于调整振荡器时钟频率的方法，包括：提供第一振荡器，向第一振荡器施加第一设定值，在第一时间帧内确定第一振荡器频率值，提供第二振荡器，向第二振荡器施加第二设定值 第二振荡器，在第二时间帧内确定第二振荡器频率值，从所述第一和第二频率值，所述第一和第二设定值以及期望频率值确定新的频率设定点值，并将所述新频率设定值应用于 第一和第二振荡器之一。
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公开(公告)号：US07907002B2
公开(公告)日：2011-03-15
申请号：US11221008
申请日：2005-09-07
申请人： Gaetan Bracmard , Henri Bottaro
发明人： Gaetan Bracmard , Henri Bottaro
IPC分类号： G05F1/10
CPC分类号： G05F3/24 , G01R31/31703 , G01R31/31713
摘要： A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator output on the previous clock cycle, signals a state machine, which sends a clocked signal to a sense circuit and voltage regulator. The sense circuit may modify a resistance in a switched resistor network, such that the output level is incrementally stepped at clocked intervals towards the reference voltage until the polarity of the error signal reverses. When the output voltage crosses the reference voltage threshold, the comparator flips states and continues to regulate output pin voltage to the reference voltage level.
摘要翻译： 电路将引脚输出电平适配到参考电平，其中数字比较器将来自器件的输出引脚的输出电压与参考电压电平进行比较。 比较器根据比较器输出的极性以及上一个时钟周期的比较器输出的注册极性，向状态机发出信号，该状态机将时钟信号发送到感测电路和稳压器。 感测电路可以修改开关电阻网络中的电阻，使得输出电平以朝向参考电压的时钟间隔逐步地步进，直到误差信号的极性反转。 当输出电压超过参考电压阈值时，比较器翻转状态并继续将输出引脚电压调节到参考电压电平。
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公开(公告)号：US20080244279A1
公开(公告)日：2008-10-02
申请号：US11691875
申请日：2007-03-27
IPC分类号： G06F1/00 , G01R19/155
CPC分类号： G06F1/266
摘要： A method including monitoring whether an externally originating signal reaches a predetermined threshold value in a host, producing an output value based on the monitoring, and identifying a power environment for the host based on the output value is described. Also described is a method for determining the power environment of a host. Systems and hosts for implementing the methods are also described.
摘要翻译： 一种方法，包括监视外部信号是否达到主机中的预定阈值，基于监视产生输出值，并且基于输出值识别主机的电源环境。 还描述了一种用于确定主机的电源环境的方法。 还描述了用于实现方法的系统和主机。
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公开(公告)号：US20060273847A1
公开(公告)日：2006-12-07
申请号：US11221008
申请日：2005-09-07
申请人： Gaetan Bracmard , Henri Bottaro
发明人： Gaetan Bracmard , Henri Bottaro
IPC分类号： G05F1/10
CPC分类号： G05F3/24 , G01R31/31703 , G01R31/31713
摘要： A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator output on the previous clock cycle, signals a state machine, which sends a clocked signal to a sense circuit and voltage regulator. The sense circuit may modify a resistance in a switched resistor network, such that the output level is incrementally stepped at clocked intervals towards the reference voltage until the polarity of the error signal reverses. When the output voltage crosses the reference voltage threshold, the comparator flips states and continues to regulate output pin voltage to the reference voltage level.
摘要翻译： 电路将引脚输出电平适配到参考电平，其中数字比较器将来自器件的输出引脚的输出电压与参考电压电平进行比较。 比较器根据比较器输出的极性以及上一个时钟周期的比较器输出的注册极性，向状态机发出信号，该状态机将时钟信号发送到感测电路和稳压器。 感测电路可以修改开关电阻网络中的电阻，使得输出电平以朝向参考电压的时钟间隔逐步地步进，直到误差信号的极性反转。 当输出电压超过参考电压阈值时，比较器翻转状态并继续将输出引脚电压调节到参考电压电平。
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公开(公告)号：US08816778B2
公开(公告)日：2014-08-26
申请号：US13552704
申请日：2012-07-19
CPC分类号： G06F1/08
摘要： A method for adjusting an oscillator clock frequency, comprising: providing a first oscillator, applying a first setpoint value to the first oscillator, determining a first oscillator frequency value within a first time frame, providing a second oscillator, applying a second setpoint value to the second oscillator, determining a second oscillator frequency value within a second time frame, determining a new frequency setpoint value from the first and second frequency values, the first and second setpoint values, and a desired frequency value, and applying the new frequency setpoint value to one of the first and second oscillators.
摘要翻译： 一种用于调整振荡器时钟频率的方法，包括：提供第一振荡器，向第一振荡器施加第一设定点值，在第一时间帧内确定第一振荡器频率值，提供第二振荡器，向第二振荡器施加第二设定值 第二振荡器，在第二时间帧内确定第二振荡器频率值，从所述第一和第二频率值，所述第一和第二设定值以及期望频率值确定新的频率设定点值，并将所述新频率设定值应用于 第一和第二振荡器之一。
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公开(公告)号：US07987380B2
公开(公告)日：2011-07-26
申请号：US11691875
申请日：2007-03-27
IPC分类号： G06F1/26
CPC分类号： G06F1/266
摘要： A method including monitoring whether an externally originating signal reaches a predetermined threshold value in a host, producing an output value based on the monitoring, and identifying a power environment for the host based on the output value is described. Also described is a method for determining the power environment of a host. Systems and hosts for implementing the methods are also described.
摘要翻译： 一种方法，包括监视外部信号是否达到主机中的预定阈值，基于监视产生输出值，并且基于输出值识别主机的电源环境。 还描述了一种用于确定主机的电源环境的方法。 还描述了用于实现方法的系统和主机。
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