公开(公告)号：US06189107B1

公开(公告)日：2001-02-13

申请号：US09219877

申请日：1998-12-24

申请人： Hyung-sun Kim ,  In-ho Lee ,  Ho-kyu Son ,  Myung-woo Lee ,  Jong-chel Weon ,  Seung-wha Yoo

发明人： Hyung-sun Kim ,  In-ho Lee ,  Ho-kyu Son ,  Myung-woo Lee ,  Jong-chel Weon ,  Seung-wha Yoo

IPC分类号： G06F126

CPC分类号： G06F1/28 ,  G06F1/26 ,  H02J9/061 ,  Y10T307/729

摘要： A fault tolerant voltage regulator module (VRM) circuit for a processor simultaneously supplies a core voltage to a plurality of processors, has a plurality of main VRMs (VRM) for supplying the same core voltage to the plurality of processors, a stand-by VRM for use upon a fault occurring in the plurality of main VRMs, a plurality of diodes connected in parallel between each of the main VRMs and the stand-by VRM for automatically supplying power to the stand-by VRM, a plurality of first power islands for connecting each of the plurality of main VRMs to the processor and each of output port of the plurality of diodes, a control signal set switch for setting output voltage level of the stand-by VRM and a second power island for connecting the stand-by VRM to input ports of the plurality of diodes and the control signal set switch. When a processor core voltage level and L2 cache voltage level are different, a fault tolerant VRM circuit further has a plurality of schottky diodes and a plurality of power MOSFETs for by-passing the schottky diodes so that the stand-by VRM can support two different voltage levels. The circuit improves stability of supplying board power owing to a fault tolerant VRM in processors and enables just one stand-by VRM to effect simultaneous support of a plurality of main VRMs and even different voltage level main VRMs using schottky diodes.

摘要翻译： 用于处理器的容错电压调节器模块（VRM）电路同时向多个处理器提供核心电压，具有用于向多个处理器提供相同核心电压的多个主VRM（VRM），备用VRM 用于在多个主VRM中发生故障时使用的多个二极管并联连接在每个主VRM和备用VRM之间，用于自动向备用VRM供电;多个第一电源岛，用于 将多个主VRM中的每一个连接到多个二极管的处理器和每个输出端口，用于设置待机VRM的输出电压电平的控制信号设置开关和用于连接备用VRM的第二电源岛 输入多个二极管的输入端口和控制信号组开关。 当处理器核心电压电平和L2高速缓存电压电平不同时，容错VRM电路还具有多个肖特基二极管和多个用于旁路肖特基二极管的功率MOSFET，使得备用VRM可以支持两个不同的 电压电平。 该电路通过处理器中的容错VRM提高了供电板电源的稳定性，并且只能使用一个备用VRM来同时支持多个主VRM以及使用肖特基二极管的甚至不同的电压级主VRM。

公开(公告)号：US06253267B1

公开(公告)日：2001-06-26

申请号：US09126601

申请日：1998-07-31

申请人： Hyung-Sun Kim ,  In-Ho Lee ,  Ho-Kyu Son ,  Myung-Jae Gil ,  Myung-Woo Lee ,  Seung-Wha Yoo

发明人： Hyung-Sun Kim ,  In-Ho Lee ,  Ho-Kyu Son ,  Myung-Jae Gil ,  Myung-Woo Lee ,  Seung-Wha Yoo

IPC分类号： G06F1300

CPC分类号： G06F13/4081

摘要： A hot-plug controller of PCI (Peripheral Components Interconnects) bus using single chip is disclosed. A PCI hot-plug controller using FPGA and ASIC implements all functions necessary for the PCI hot-plug on a single chip, the PCI hot-plug controller includes: System Interface Unit transmitting data via PCI, USB and I2C bus; Register Unit, which is connected to the System Interface Unit, and receives reset control signal, Present Detection signal, Enable signal, LED control signal and physical ID signal from the outside, and stores the signals; Power Control Unit reading data from the Register Unit and outputting signal to control the system power and slot power; and Bus Isolation Unit reading the control signal from the Register Unit and making the signal-line between PCI bus signal and PCI slot ON/OFF.

摘要翻译： 公开了使用单芯片的PCI（外围组件互连）总线的热插拔控制器。 使用FPGA和ASIC的PCI热插拔控制器在单个芯片上实现PCI热插拔所需的所有功能，PCI热插拔控制器包括：系统接口单元通过PCI，USB和I2C总线传输数据; 寄存器单元，连接到系统接口单元，并从外部接收复位控制信号，当前检测信号，使能信号，LED控制信号和物理ID信号，并存储信号; 电源控制单元从寄存器单元读取数据并输出信号以控制系统电源和插槽电源; 和总线隔离单元读取寄存器单元的控制信号，并使PCI总线信号和PCI插槽之间的信号线开/关。

公开(公告)号：US06233635B1

公开(公告)日：2001-05-15

申请号：US09114306

申请日：1998-07-10

申请人： Ho-kyu Son

发明人： Ho-kyu Son

IPC分类号： G06F1300

CPC分类号： G06F13/4291

摘要： A diagnostic/control system using a multi-level I2C bus, includes: multiple I2C bus master devices (MD0 to MDn) connected to a primary I2C bus; a I2C bus multiplexer module, which separates multiple secondary I2C buses from said primary I2C bus, and which connects as many I2C bus slave devices (SD00 to SD0N, SD10 to SD1N, . . . , SDN1 to SDNN) are needed on said secondary I2C bus; and I2C bus slave devices (SD00 to SD0N, SD10 to SD1N, SDN1 to SDNN) connected to said secondary I2C bus. The I2C bus multiplexer module provides access at any instant between any I2C bus master device (MD0 to MDn) and any I2C bus slave device on the secondary I2C bus.

摘要翻译： 使用多级I2C总线的诊断/控制系统包括：连接到主I2C总线的多个I2C总线主设备（MD0至MDn）; 一个I2C总线复用器模块，它将多个辅助I2C总线与所述主I2C总线分离，并且在所述辅助I2C上需要连接许多I2C总线从设备（SD00至SD0N，SD10至SD1N，...，SDN1至SDNN） 总线; 和I2C总线从设备（SD00至SD0N，SD10至SD1N，SDN1至SDNN）连接到所述辅助I2C总线。 I2C总线复用器模块可在任何I2C总线主器件（MD0至MDn）与辅助I2C总线上任何I2C总线从器件之间的任何时刻提供访问。