公开(公告)号：US20150180530A1

公开(公告)日：2015-06-25

申请号：US14134268

申请日：2013-12-19

申请人： ICERA, Inc.

发明人： Lucas Maria Florentinus de Maaijer

IPC分类号： H04B1/40 ,  H04W88/06 ,  H04B7/04

CPC分类号： H04B1/401 ,  H04B1/005 ,  H04B1/405 ,  H04B7/0413 ,  H04W88/06

摘要： A transceiver, a method of providing multiple-band virtual concurrent wireless communication and a wireless device incorporating the transceiver or the method. In one embodiment, the transceiver includes: (1) first transmit and receive intermediate frequency (IF) strips, (2) second transmit and receive IF strips, (3) first and second local oscillators (LOs) and (4) switches operable to multiplex clock signals from the first and second local oscillators to cause the transceiver to operate in a selectable one of: (4a) a unified, multiple-input, multiple-output (MIMO) mode in which the first and second transmit and receive IF strips are driven to transmit and receive in a first band and (4b) a concurrent multiple-band connection mode in which the first transmit and receive IF strips are driven in the first band and the second transmit and receive IF strips are concurrently driven in a second band.

摘要翻译： 收发机，提供多频带虚拟并发无线通信的方法和结合收发机或方法的无线设备。 在一个实施例中，收发器包括：（1）第一发送和接收中频（IF）条，（2）第二发送和接收IF条，（3）第一和第二本地振荡器（LO）和（4）可操作以 复用来自第一和第二本地振荡器的时钟信号以使收发器以可选择的方式工作：（4a）统一的多输入多输出（MIMO）模式，其中第一和第二发射和接收IF带 被驱动以在第一频带中发送和接收，并且（4b）并行多频带连接模式，其中第一发射和接收IF频带在第一频带中被驱动，并且第二发射和接收IF频带在第二频带中同时被驱动 带。

公开(公告)号：US10003378B2

公开(公告)日：2018-06-19

申请号：US14170385

申请日：2014-01-31

申请人： ICERA Inc.

发明人： Carlo Luschi ,  Steve Allpress

IPC分类号： H04B1/06 ,  H04B1/7115 ,  H04B1/00

CPC分类号： H04B1/7115 ,  H04B1/0003

摘要： One aspect provides a method of processing a signal transmitted over a channel in a wireless communication system. In one embodiment, the method comprises receiving at a receiver the signal transmitted over the channel, estimating at intervals at least one parameter of a time varying communication environment of the system, monitoring at least one processor-related criterion of a processor at the receiver, and selecting a signal processing function from a plurality of signal processing functions implementable by the processor. The selecting of the signal processing function is based on both the at least one parameter and the at least one processor-related criterion. Each signal processing function comprises a plurality of code blocks which process the received signal. Each code block of the plurality of code blocks comprises a sequence of instructions for execution by on a processor platform of the processor.

公开(公告)号：US20130243053A1

公开(公告)日：2013-09-19

申请号：US13896522

申请日：2013-05-17

申请人： Icera, Inc.

发明人： Hamid Safiri

IPC分类号： H04L25/03

CPC分类号： H04L25/03853

摘要： A fractional rate converting filter in a wireless transceiver comprising a delay line, multiplier circuit, adder circuit, and selector. The delay line receives a digital input signal at a first sample rate and has delay blocks each providing an output and receiving samples gated at a plurality of clock cycles of an integer sub-multiple frequency of a clock. The outputs are multiplied by corresponding filter tap coefficients. Each filter tap coefficient is spaced by a first integer Y. The adder circuit receives and sums the tap outputs to provide an output signal. The selector iteratively shifts the coefficients by a second integer Z. The output of each delay block is multiplied by corresponding shifted filter tap coefficients. The delay blocks are inhibited from receiving another input sample during the plurality of clock cycles. The output signal has a second sample rate at the integer sub-multiple frequency of the clock.

摘要翻译： 包括延迟线，乘法器电路，加法器电路和选择器的无线收发机中的分数速率转换滤波器。 延迟线以第一采样率接收数字输入信号，并且具有延迟块，每个延迟块提供输出并接收在时钟的整数次多重频率的多个时钟周期中门控的采样。 输出乘以相应的滤波器抽头系数。 每个滤波器抽头系数由第一个整数Y隔开。加法器电路接收抽头输出并对其提供输出信号。 选择器将系数迭代地移位第二整数Z.每个延迟块的输出乘以相应的移位滤波器抽头系数。 在多个时钟周期期间，延迟块被禁止接收另一输入采样。 输出信号在时钟的整数子倍频率处具有第二采样率。

公开(公告)号：US20140146858A1

公开(公告)日：2014-05-29

申请号：US14170385

申请日：2014-01-31

申请人： ICERA Inc.

发明人： Carlo Luschi ,  Steve Allpress

IPC分类号： H04B1/7115

CPC分类号： H04B1/7115 ,  H04B1/0003

摘要： One aspect provides a method of processing a signal transmitted over a channel in a wireless communication system. In one embodiment, the method comprises receiving at a receiver the signal transmitted over the channel, estimating at intervals at least one parameter of a time varying communication environment of the system, monitoring at least one processor-related criterion of a processor at the receiver, and selecting a signal processing function from a plurality of signal processing functions implementable by the processor. The selecting of the signal processing function is based on both the at least one parameter and the at least one processor-related criterion. Each signal processing function comprises a plurality of code blocks which process the received signal. Each code block of the plurality of code blocks comprises a sequence of instructions for execution by on a processor platform of the processor.

摘要翻译： 一方面提供一种处理在无线通信系统中通过信道发送的信号的方法。 在一个实施例中，该方法包括在接收机处接收通过信道发送的信号，以间隔的方式估计系统的时变通信环境的至少一个参数，监视接收机处理器的至少一个与处理器有关的标准， 以及从由处理器可实现的多个信号处理功能中选择信号处理功能。 所述信号处理功能的选择基于所述至少一个参数和所述至少一个处理器相关标准。 每个信号处理功能包括处理接收信号的多个码块。 多个代码块的每个代码块包括用于在处理器的处理器平台上执行的指令序列。

公开(公告)号：US09112588B2

公开(公告)日：2015-08-18

申请号：US14134268

申请日：2013-12-19

申请人： ICERA, Inc.

发明人： Lucas Maria Florentinus de Maaijer

IPC分类号： H04B1/38 ,  H04B1/401 ,  H04B7/04 ,  H04W88/06

CPC分类号： H04B1/401 ,  H04B1/005 ,  H04B1/405 ,  H04B7/0413 ,  H04W88/06

摘要： A transceiver, a method of providing multiple-band virtual concurrent wireless communication and a wireless device incorporating the transceiver or the method. In one embodiment, the transceiver includes: (1) first transmit and receive intermediate frequency (IF) strips, (2) second transmit and receive IF strips, (3) first and second local oscillators (LOs) and (4) switches operable to multiplex clock signals from the first and second local oscillators to cause the transceiver to operate in a selectable one of: (4a) a unified, multiple-input, multiple-output (MIMO) mode in which the first and second transmit and receive IF strips are driven to transmit and receive in a first band and (4b) a concurrent multiple-band connection mode in which the first transmit and receive IF strips are driven in the first band and the second transmit and receive IF strips are concurrently driven in a second band.

摘要翻译： 收发机，提供多频带虚拟并发无线通信的方法和结合收发机或方法的无线设备。 在一个实施例中，收发器包括：（1）第一发送和接收中频（IF）条，（2）第二发送和接收IF条，（3）第一和第二本地振荡器（LO）和（4）可操作以 复用来自第一和第二本地振荡器的时钟信号以使收发器以可选择的方式工作：（4a）统一的多输入多输出（MIMO）模式，其中第一和第二发射和接收IF带 被驱动以在第一频带中发送和接收，并且（4b）并行多频带连接模式，其中第一发射和接收IF频带在第一频带中被驱动，并且第二发射和接收IF频带在第二频带中同时被驱动 带。

公开(公告)号：US08654821B2

公开(公告)日：2014-02-18

申请号：US13896522

申请日：2013-05-17

申请人： Icera, Inc.

发明人： Hamid Safiri

IPC分类号： H04B1/38

CPC分类号： H04L25/03853

摘要： A fractional rate converting filter in a wireless transceiver comprising a delay line, multiplier circuit, adder circuit, and selector. The delay line receives a digital input signal at a first sample rate and has delay blocks each providing an output and receiving samples gated at a plurality of clock cycles of an integer sub-multiple frequency of a clock. The outputs are multiplied by corresponding filter tap coefficients. Each filter tap coefficient is spaced by a first integer Y. The adder circuit receives and sums the tap outputs to provide an output signal. The selector iteratively shifts the coefficients by a second integer Z. The output of each delay block is multiplied by corresponding shifted filter tap coefficients. The delay blocks are inhibited from receiving another input sample during the plurality of clock cycles. The output signal has a second sample rate at the integer sub-multiple frequency of the clock.

摘要翻译： 包括延迟线，乘法器电路，加法器电路和选择器的无线收发机中的分数速率转换滤波器。 延迟线以第一采样率接收数字输入信号，并且具有延迟块，每个延迟块提供输出并接收在时钟的整数次多重频率的多个时钟周期中门控的采样。 输出乘以相应的滤波器抽头系数。 每个滤波器抽头系数由第一个整数Y隔开。加法器电路接收抽头输出并对其提供输出信号。 选择器将系数迭代地移位第二整数Z.每个延迟块的输出乘以相应的移位滤波器抽头系数。 在多个时钟周期期间，延迟块被禁止接收另一输入采样。 输出信号在时钟的整数子倍频率处具有第二采样率。