公开(公告)号：US4487474A

公开(公告)日：1984-12-11

申请号：US280043

申请日：1981-07-06

申请人： Mitsuaki Nishie ,  Satoru Iguchi ,  Ichiro Kono

发明人： Mitsuaki Nishie ,  Satoru Iguchi ,  Ichiro Kono

IPC分类号： G02B6/38 ,  G02B7/26

CPC分类号： G02B6/3849 ,  G02B6/3825 ,  G02B6/3874 ,  G02B6/3854 ,  G02B6/3894

摘要： An optical connector in which a pair of ceramic optical plugs having optical fibers extending coaxially therethrough are fitted within a ceramic sleeve. In one embodiment, an inner surface of the sleeve is provided with a longitudinal groove extending from one end of the sleeve to the other so that air and dust will be expelled from the sleeve when plugs are inserted therein. A housing may be provided around the sleeve with a flange being formed on the housing. In another embodiment, a protective cover is provided surrounding each plug which is movable axially along the plug.

摘要翻译： 一种光连接器，其中一对具有同轴延伸的光纤的陶瓷光学插头装配在陶瓷套筒内。 在一个实施例中，套筒的内表面设置有从套筒的一端延伸到另一端的纵向凹槽，使得当插头插入其中时，空气和灰尘将从套筒中排出。 可以在套筒周围设置壳体，其中凸缘形成在壳体上。 在另一个实施例中，围绕每个插头设置保护盖，其可沿着插头轴向移动。

公开(公告)号：US07984649B2

公开(公告)日：2011-07-26

申请号：US12262537

申请日：2008-10-31

申请人： Ichiro Kono ,  Kenzo Takeda ,  Shin Yoshida

发明人： Ichiro Kono ,  Kenzo Takeda ,  Shin Yoshida

IPC分类号： G01N29/12

CPC分类号： G01N29/12 ,  G01M7/025 ,  G01N29/045 ,  G01N29/30 ,  G01N29/46

摘要： A panel inspection apparatus includes a resonant frequency extracting unit for extracting a plurality of resonant frequencies of a panel, a resonant frequency selecting unit for selecting a combination of resonant frequencies consisting of two resonant frequencies A and B with different vibration propagation paths among the extracted plurality of resonant frequencies, a non-defective range generating unit for generating a non-defective range on a coordinate system in which resonant frequencies A and B are taken on coordinate axes by statistically processing a set of the resonant frequencies A and B selected for each of a plurality of non-defective panels determined as non-defective in advance, and a panel quality determining unit for determining whether the quality of the panel to be inspected is good based on comparison between resonant frequencies A and B selected for the panel to be inspected and the non-defective range generated by the non-defective range generating unit.

摘要翻译： 面板检查装置包括用于提取面板的多个谐振频率的谐振频率提取单元，用于选择由两个谐振频率A和B组成的谐振频率的组合的谐振频率选择单元与提取的多个振荡传播路径中的不同的振动传播路径 谐振频率的无缺陷范围产生单元，用于通过统计处理为每个谐振频率选择的谐振频率A和B的集合来统计地处理坐标系上的无缺陷范围，其中谐振频率A和B在坐标轴上被拍摄 预先确定为无缺陷的多个无缺陷面板;以及面板质量确定单元，用于基于要检查的面板选择的谐振频率A和B之间的比较来确定被检查面板的质量是否良好 以及由无缺陷范围产生单元产生的无缺陷范围。

公开(公告)号：US06515521B2

公开(公告)日：2003-02-04

申请号：US09927936

申请日：2001-08-13

申请人： Ichiro Kono ,  Kazuo Yano ,  Naoki Kato

发明人： Ichiro Kono ,  Kazuo Yano ,  Naoki Kato

IPC分类号： H03B100

CPC分类号： H03K19/01707 ,  G11C7/1078 ,  G11C7/1084 ,  H01L27/0203 ,  H03K19/0013

摘要： A semiconductor integrated circuit includes: a first p-channel FET having a gate controlled by a first input and having a source-drain path connected between a first operating potential point and a first node; a first n-channel FET having a gate controlled by a second input and having a source-drain path connected between the first node and a second node; a second n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a second operating potential point; a third n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a third operating potential point; a second p-channel FET having a gate controlled by the first input and having a source-drain path connected between a third node and a fourth node; a third p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between the first operating potential point and the third node; a fourth p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between a fourth operating potential point and the third node; and a fourth n-channel FET having a gate controlled by the second input and having a source-drain path connected between the fourth node and the second operating potential point.

摘要翻译： 半导体集成电路包括：第一p沟道FET，具有由第一输入控制的栅极，并且具有连接在第一工作电位点和第一节点之间的源极 - 漏极路径; 第一n沟道FET，具有由第二输入控制的栅极，并且具有连接在第一节点和第二节点之间的源极 - 漏极路径; 第二n沟道FET，具有由第一节点控制的栅极，并且具有连接在第二节点和第二工作电位点之间的源极 - 漏极路径; 第三n沟道FET，具有由第一节点控制的栅极，并且具有连接在第二节点和第三工作电位点之间的源极 - 漏极路径; 第二p沟道FET，具有由第一输入控制的栅极，并且具有连接在第三节点和第四节点之间的源极 - 漏极路径; 第三p沟道FET，具有由第四节点控制的栅极，并且具有连接在第一工作电位点和第三节点之间的源极 - 漏极路径; 第四p沟道FET，具有由第四节点控制的栅极，并且具有连接在第四工作电位点和第三节点之间的源极 - 漏极路径; 以及第四n沟道FET，其栅极由第二输入端控制，并且具有连接在第四节点和第二工作电位点之间的源极 - 漏极路径。

公开(公告)号：USD277583S

公开(公告)日：1985-02-12

申请号：US610186

申请日：1984-05-16

申请人： Ichiro Kono

设计人： Ichiro Kono

公开(公告)号：US20090114018A1

公开(公告)日：2009-05-07

申请号：US12262537

申请日：2008-10-31

申请人： Ichiro Kono ,  Kenzo Takeda ,  Shin Yoshida

发明人： Ichiro Kono ,  Kenzo Takeda ,  Shin Yoshida

IPC分类号： G01N29/12

CPC分类号： G01N29/12 ,  G01M7/025 ,  G01N29/045 ,  G01N29/30 ,  G01N29/46

摘要： A panel inspection apparatus includes a resonant frequency extracting unit for extracting a plurality of resonant frequencies of a panel, a resonant frequency selecting unit for selecting a combination of resonant frequencies consisting of two resonant frequencies A and B with different vibration propagation paths among the extracted plurality of resonant frequencies, a non-defective range generating unit for generating a non-defective range on a coordinate system in which resonant frequencies A and B are taken on coordinate axes by statistically processing a set of the resonant frequencies A and B selected for each of a plurality of non-defective panels determined as non-defective in advance, and a panel quality determining unit for determining whether the quality of the panel to be inspected is good based on comparison between resonant frequencies A and B selected for the panel to be inspected and the non-defective range generated by the non-defective range generating unit.

摘要翻译： 面板检查装置包括用于提取面板的多个谐振频率的谐振频率提取单元，用于选择由两个谐振频率A和B组成的谐振频率的组合的谐振频率选择单元与提取的多个振荡传播路径中的不同的振动传播路径 谐振频率的无缺陷范围产生单元，用于通过统计处理为每个谐振频率选择的谐振频率A和B的集合来统计地处理坐标系上的无缺陷范围，其中谐振频率A和B在坐标轴上被拍摄 预先确定为无缺陷的多个无缺陷面板;以及面板质量确定单元，用于基于被检查面板选择的谐振频率A和B之间的比较来确定被检查面板的质量是否良好 以及由无缺陷范围产生单元产生的无缺陷范围。

公开(公告)号：US06788105B2

公开(公告)日：2004-09-07

申请号：US09931878

申请日：2001-08-20

申请人： Ichiro Kono

发明人： Ichiro Kono

IPC分类号： H03K19173

CPC分类号： G01R31/318533

摘要： A 2-input AND gate is inserted between an output terminal of a scan flipflop with an input selectable gate and a logic output signal line. The 2-input AND gate is controlled by a scan-enable signal line, and has a role to fix the transition of the output signal of the scan flipflop.

摘要翻译： 在输入可选择栅极和逻辑输出信号线的扫描触发器的输出端子之间插入2输入与门。 2输入与门由扫描使能信号线控制，并且具有固定扫描触发器输出信号的转换的作用。

公开(公告)号：US06297674B1

公开(公告)日：2001-10-02

申请号：US09436501

申请日：1999-11-09

申请人： Ichiro Kono ,  Kazuo Yano ,  Naoki Kato

发明人： Ichiro Kono ,  Kazuo Yano ,  Naoki Kato

IPC分类号： H03B100

CPC分类号： H03K19/01707 ,  G11C7/1078 ,  G11C7/1084 ,  H01L27/0203 ,  H03K19/0013

摘要： In order to provide a semiconductor integrated circuit in which power consumption due to a leakage current in an active mode can be suppressed and which can operate at a high speed, the semiconductor integrated circuit includes: a first p-channel FET having a gate controlled by a first input and having a source-drain path connected between a first operating potential point and a first node; a first n-channel FET having a gate controlled by a second input and having a source-drain path connected between the first node and a second node; a second n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a second operating potential point; a third n-channel FET having a gate controlled by the first node and having a source-drain path connected between the second node and a third operating potential point; a second p-channel FET having a gate controlled by the first input and having a source-drain path connected between a third node and a fourth node; a third p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between the first operating potential point and the third node; a fourth p-channel FET having a gate controlled by the fourth node and having a source-drain path connected between a fourth operating potential point and the third node; and a fourth n-channel FET having a gate controlled by the second input and having a source-drain path connected between the fourth node and the second operating potential point.

摘要翻译： 为了提供半导体集成电路，其中可以抑制由于主动模式中的漏电流而导致的功率消耗并且可以高速运行的半导体集成电路，所述半导体集成电路包括：第一p沟道FET，其栅极由 第一输入端，具有连接在第一工作电位点和第一节点之间的源极 - 漏极路径; 第一n沟道FET，具有由第二输入控制的栅极，并且具有连接在第一节点和第二节点之间的源极 - 漏极路径; 第二n沟道FET，具有由第一节点控制的栅极，并且具有连接在第二节点和第二工作电位点之间的源极 - 漏极路径; 第三n沟道FET，具有由第一节点控制的栅极，并且具有连接在第二节点和第三工作电位点之间的源极 - 漏极路径; 第二p沟道FET，其具有由第一输入控制的栅极，并且具有连接在第三节点和第四节点之间的源极 - 漏极路径; 第三p沟道FET，具有由第四节点控制的栅极，并且具有连接在第一工作电位点和第三节点之间的源极 - 漏极路径; 第四p沟道FET，具有由第四节点控制的栅极，并且具有连接在第四工作电位点和第三节点之间的源极 - 漏极路径; 以及第四n沟道FET，其栅极由第二输入端控制，并且具有连接在第四节点和第二工作电位点之间的源极 - 漏极路径。

公开(公告)号：US06191764B1

公开(公告)日：2001-02-20

申请号：US09056184

申请日：1998-04-06

申请人： Ichiro Kono ,  Masaharu Shioya ,  Hiroyasu Yamada

发明人： Ichiro Kono ,  Masaharu Shioya ,  Hiroyasu Yamada

IPC分类号： G09G310

CPC分类号： G09G3/2025 ,  G09G3/3258 ,  G09G2300/0417 ,  G09G2300/06 ,  G09G2320/0276 ,  G09G2330/025 ,  G09G2360/142 ,  H01L27/3227

摘要： A phototransistor having a non-linear light vs. conductivity characteristics and an organic electroluminescent layer are sandwiched by a pair of electrodes, a predetermined voltage is applied to the pair of electrodes, and address light is irradiated on a phototransistor to let a current flow in the phototransistor, thus causing the electroluminescent layer to emit light. It is therefore possible to drive the device to present crosstalk-free gradation display with a high contrast ratio.

摘要翻译： 具有非线性光与电导率特性的光电晶体管和有机电致发光层被一对电极夹在一对电极上施加预定电压，并且将光照射在光电晶体管上以使电流流入 光电晶体管，从而使电致发光层发光。 因此可以驱动该装置以高对比度呈现无串扰灰度显示。