公开(公告)号：US5675771A

公开(公告)日：1997-10-07

申请号：US311649

申请日：1994-09-23

申请人： John L. Curley ,  Thomas S. Hirsch ,  James W. Stonier ,  Kin C. Yu

发明人： John L. Curley ,  Thomas S. Hirsch ,  James W. Stonier ,  Kin C. Yu

IPC分类号： G06F1/00 ,  G06F9/455 ,  G06F9/46 ,  G06F13/10 ,  G06F21/00 ,  G06F15/16

CPC分类号： G06F13/10 ,  G06F13/105 ,  G06F21/31 ,  G06F21/6281 ,  G06F9/45537 ,  G06F2221/2105

摘要： A host data processing system which includes a plurality of input/output devices operates under the control of an enhanced version of the UNIX operating system. The host system includes an emulator which runs as an application process for executing user emulated system (ES) application programs. The emulator includes a number of emulated system executive service components operating in shared memory and an interpreter, an emulator monitor call unit (EMCU) and a number of server facilities operating in the host memory. The ES executive service command handler component is extended to accommodate a number of dual decor commands which invoke host system facilities to execute terminal based commands either synchronously or asynchronously through the automatic creation of host shell mechanisms directly accessible by emulated system users. The server facilities include a network terminal driver (NTD) server for executing emulated system user terminal requests through host system drivers. Additionally, the NTD server includes mechanisms enabling a user to have direct terminal access to host facilities for executing procedures through such shell mechanisms. The mechanisms perform trusted user level validation when each dual decor command is issued and the shell mechanisms use the host access control mechanisms for checking access when the procedure is executed preventing both unauthorized user access and compromises in user data through the improper use of dual decor commands.

摘要翻译： 包括多个输入/输出设备的主机数据处理系统在UNIX操作系统的增强版本的控制下操作。 主机系统包括作为执行用户仿真系统（ES）应用程序的应用程序运行的仿真器。 仿真器包括在共享存储器中操作的多个模拟系统执行服务组件和解释器，仿真器监视器呼叫单元（EMCU）以及在主机存储器中操作的多个服务器设备。 ES执行服务命令处理程序组件被扩展以适应一些双重装饰命令，其通过自动创建由仿真系统用户直接访问的主机壳机制来同步或异步地调用主机系统设施来执行基于终端的命令。 服务器设备包括用于通过主机系统驱动程序执行仿真系统用户终端请求的网络终端驱动器（NTD）服务器。 此外，NTD服务器包括使得用户能够直接终端访问主机设施以执行通过这些机壳的过程的机制。 当执行每个双重装饰命令时，这些机制执行受信任的用户级别验证，并且当执行该过程时，shell机制使用主机访问控制机制来检查访问，以防止未经授权的用户访问并且通过不正确地使用双装饰命令来损害用户数据 。

公开(公告)号：US4951245A

公开(公告)日：1990-08-21

申请号：US196597

申请日：1988-05-20

申请人： Christopher R. M. Bailey ,  John R. Mandile ,  Daniel G. Peters ,  James W. Stonier

发明人： Christopher R. M. Bailey ,  John R. Mandile ,  Daniel G. Peters ,  James W. Stonier

IPC分类号： G06F9/48

CPC分类号： G06F9/4843

摘要： In a data processing system having a plurality of remote terminals, possibly of several kinds, connected by a plurality of communications media, also possibly of several kinds, from which terminals users may run a plurality of application programs in the central processing unit (CPU) of the data processing system, the CPU is provided with a network terminal driver for regulating transmissions between the various application programs and the various types of terminals over the various types of communications media. Means are provided for specifying the characteristics of the various types of application programs, terminals, and communications media, and the network terminal drive is responsive to those means.

公开(公告)号：US4722048A

公开(公告)日：1988-01-26

申请号：US719771

申请日：1985-04-03

申请人： Thomas S. Hirsch ,  James W. Stonier ,  Thomas O. Holtey

发明人： Thomas S. Hirsch ,  James W. Stonier ,  Thomas O. Holtey

IPC分类号： G06F13/16 ,  G06F15/167 ,  G06F15/16

CPC分类号： G06F15/167 ,  G06F13/1663

摘要： A computer system is described wherein two independent processors communicate via a bus system and operate substantially concurrently, each computer having its own operating system software and share a common memory. The architecture of the computer system is such that one of the processors is allocated the bulk of memory band-width with the other processor taking the remainder. Arbitration for memory allocation is accomplished via a combination of a new firmware instruction and a semaphore.

摘要翻译： 描述了一种计算机系统，其中两个独立的处理器经由总线系统进行通信并且基本同时地进行操作，每个计算机具有其自己的操作系统软件并且共享公共存 计算机系统的架构使得其中一个处理器被分配大量的存储器带宽，而另一个处理器占用剩余部分。 用于存储器分配的仲裁通过新的固件指令和信号量的组合来实现。

公开(公告)号：US4665481A

公开(公告)日：1987-05-12

申请号：US503962

申请日：1983-06-13

申请人： James W. Stonier ,  Thomas L. Murray, Jr. ,  Gary J. Goss ,  Thomas O. Holtey

发明人： James W. Stonier ,  Thomas L. Murray, Jr. ,  Gary J. Goss ,  Thomas O. Holtey

IPC分类号： G06F13/28 ,  G06F3/00 ,  G06F13/00

CPC分类号： G06F13/285

摘要： A microprogrammed data processing system includes a central processing unit (CPU), a main memory and a number of mass storage controllers. A block of information is transferred between main memory and one of the mass storage controllers during data multiplex control (DMC) cycles. The main memory stores 2 data bytes in each word location. An input/output RAM stores channel number signals for identifying mass storage controllers. An I/O microprocessor addresses the I/O RAM to read the channel number signals onto the system bus, and a mass storage controller coupled to the system bus responds to the channel number signals to generate a read/write signal. The system responds to a request signal, the read/write signal and a signal indicative of a left or right bit of an addressed location in main memory to generate a plurality of data request signals. A read only memory is addressed in response to the data request signals to read out a plurality of microprograms for processing the data.

摘要翻译： 微程序数据处理系统包括中央处理单元（CPU），主存储器和多个大容量存储控制器。 在数据多路复用控制（DMC）周期期间，一块信息在主存储器和大容量存储控制器之一之间传送。 主存储器在每个字位置存储2个数据字节。 输入/输出RAM存储用于识别大容量存储控制器的通道号信号。 I / O微处理器将I / O RAM寻址到系统总线上的通道号信号，耦合到系统总线的大容量存储控制器响应信道号信号以产生读/写信号。 系统响应请求信号，读/写信号和指示主存储器中寻址位置的左或右位的信号，以产生多个数据请求信号。 响应于数据请求信号寻址只读存储器以读出用于处理数据的多个微程序。

公开(公告)号：US5673418A

公开(公告)日：1997-09-30

申请号：US319848

申请日：1994-10-07

申请人： James W. Stonier ,  Michael E. Tessier

发明人： James W. Stonier ,  Michael E. Tessier

IPC分类号： G06F13/10 ,  G06F3/00 ,  G06F13/00

CPC分类号： G06F13/105

摘要： A host data processing system which includes a plurality of input/output devices operates under the control of an enhanced version of the UNIX operating system. The host system includes an emulator which runs as an application process for executing user emulated system (ES) application programs. The emulator includes a number of emulated system executive service components operating in shared memory and an interpreter, an emulator monitor call unit (EMCU) and a network terminal driver (NTD) component operating in the host memory. Configuration command means are provided for initially configuring a host terminal to operate in a plurality of asynchronous driver (ATD) modes implemented by the NTD component. When a terminal has been configured by a user to run applications written for the ATD driver, it sets a mode indication which causes the NTD component to respond to user applications as an ATD driver and determine if each ATD request can be carried out with functionality included within the NTD component. If the request can be carrier out, the NTD component translates ATD device specific information contained in each request into NTD device specific information which invokes the required functionality at the appropriate time so that the request can be processed by the NTD component. At the completion of each such request, the NTD component utilizing information contained in the original request updates the return status information to that of the ATD driver. This arrangement provides ATD applications access to NTD controlled host terminals without having to port ATD software or have users modify their existing applications.

摘要翻译： 包括多个输入/输出设备的主机数据处理系统在UNIX操作系统的增强版本的控制下操作。 主机系统包括作为执行用户仿真系统（ES）应用程序的应用程序运行的仿真器。 仿真器包括在共享存储器中操作的多个模拟系统执行服务组件，以及在主机存储器中操作的解释器，仿真器监视器调用单元（EMCU）和网络终端驱动器（NTD）组件。 提供了用于初始配置主机终端以由NTD组件实现的多个异步驱动器（ATD）模式操作的配置命令装置。 当终端已被用户配置以运行为ATD驱动程序编写的应用程序时，它设置一个模式指示，其使得NTD组件作为ATD驱动器响应用户应用，并且确定每个ATD请求是否可以执行功能包括 在NTD组件内。 如果请求可以被载入，则NTD组件将包含在每个请求中的ATD设备特定信息转换为在适当时间调用所需功能的NTD设备特定信息，以便可以由NTD组件处理该请求。 在完成每个这样的请求时，使用原始请求中包含的信息的NTD组件将返回状态信息更新为ATD驱动程序的返回状态信息。 这种安排提供ATD应用程序访问NTD受控主机终端，而无需端口ATD软件或者用户修改其现有应用程序。

公开(公告)号：US5231599A

公开(公告)日：1993-07-27

申请号：US779146

申请日：1991-10-21

申请人： Daniel G. Peters ,  James W. Stonier

发明人： Daniel G. Peters ,  James W. Stonier

IPC分类号： G06F9/45 ,  G06F17/27 ,  H04L29/06

CPC分类号： G06F8/427 ,  G06F17/274 ,  H04L29/06 ,  H04L69/06

摘要： A controller for controlling a large number of terminals and workstations semantically interprets entering character sequences with little load on its computing power by means of dispatching under the control of a hierarchical arrangement of lookup tables, wherein one possible action that may be dispatched to is the selection of another table in the hierarchy. Characters may thus be interpreted in the context of the characters that have preceded them. Another possible action is to switch to a memory search mode of interpretation, eliminating the need to provide lookup tables for infrequently occurring sequences.

摘要翻译： 用于控制大量终端和工作站的控制器通过在查找表的分层布置的控制下通过调度来语义地解释输入字符序列对其计算能力的负担较小，其中可以调度为选择的一个可能的动作 的层次结构中的另一个表。 因此，字符可以在其之前的字符的上下文中被解释。 另一种可能的行为是切换到存储器搜索模式的解释，消除了为不经常发生的序列提供查找表的需要。

公开(公告)号：US4665482A

公开(公告)日：1987-05-12

申请号：US503963

申请日：1983-06-13

申请人： Thomas L. Murray, Jr. ,  James W. Stonier ,  Gary J. Goss ,  Thomas O. Holtey

发明人： Thomas L. Murray, Jr. ,  James W. Stonier ,  Gary J. Goss ,  Thomas O. Holtey

IPC分类号： G06F13/28 ,  G06F15/167 ,  G06F3/00 ,  G06F13/00

CPC分类号： G06F15/167 ,  G06F13/285

摘要： A data processing system includes a central processing unit (CPU), an input/output microprocessor, a main memory and a number of mass storage controllers. A block of information is transferred between one of the mass storage controllers and main memory during data multiplex control (DMC) cycles. The CPU includes registers which store the address of main memory into which the next data byte is written or read from and the range indicating the number of data bytes remaining to be transferred. Prior to a DMC cycle the CPU stores address and range information in a mailbox location in an I/O RAM and the I/O microprocessor transfers that information to channel table locations in the I/O RAM. For a DMC operation, the I/O microprocessor transfers the address and range information to the mailbox location and transfers the mass storage information to the mass storage controller. It signals a CPU interrupt and issues a read or write order to the mass storage controller. The CPU then retrieves the address and range information from the mailbox location and initiates a DMC cycle.

摘要翻译： 数据处理系统包括中央处理单元（CPU），输入/输出微处理器，主存储器和多个大容量存储控制器。 在数据多路复用控制（DMC）周期期间，一块信息在大容量存储控制器和主存储器之间传送。 CPU包括存储下一个数据字节被写入或读取的主存储器的地址的寄存器以及指示待传送的数据字节数的范围。 在DMC循环之前，CPU将地址和范围信息存储在I / O RAM中的邮箱位置，I / O微处理器将该信息传输到I / O RAM中的通道表位置。 对于DMC操作，I / O微处理器将地址和范围信息传送到邮箱位置，并将大容量存储信息传输到大容量存储控制器。 它发出CPU中断信号，向大容量存储控制器发出读或写命令。 CPU然后从邮箱位置检索地址和范围信息，并启动DMC循环。