公开(公告)号：US06407569B1

公开(公告)日：2002-06-18

申请号：US09275295

申请日：1999-03-24

申请人： Jeffrey Paul Boettler ,  Robert Glen Gerowitz ,  William Arthur Noon ,  Howard James Schubert, Jr. ,  Chad Everett Winemiller

发明人： Jeffrey Paul Boettler ,  Robert Glen Gerowitz ,  William Arthur Noon ,  Howard James Schubert, Jr. ,  Chad Everett Winemiller

IPC分类号： G01R3128

CPC分类号： G01R31/318572 ,  G01R31/31926

摘要： Stuck-at fault, shorted and open circuit conditions occurring in the differential inputs to Differential Receivers on a Large Scale Integrated (LSI) chip are detected by a test circuit arrangement fabricated on the chip. The test circuit arrangement includes Pass Gate devices operatively coupled to the differential inputs and an Exclusive NOR circuit (XNOR) coupled to the Pass Gate devices. Pull devices are coupled to the Pass Gate devices and the differential inputs. By activating the Pass Gate devices and applying a test sequence to the differential inputs, the state of the output of the XNOR circuit indicates if an open circuit, stuck-at or short exists in the inputs to the Differential Receiver.

摘要翻译： 在大规模集成（LSI）芯片上的差分接收器的差分输入中出现的故障，短路和开路状况由芯片上制造的测试电路布置检测。 测试电路装置包括可操作地耦合到差分输入的通过栅极器件和耦合到通过栅极器件的异或异或电路（XNOR）。 拉动装置耦合到通过门装置和差分输入。 通过激活Pass Gate器件并将测试序列应用于差分输入，XNOR电路的输出状态指示差分接收器的输入中是否存在开路，卡住或短路。