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1.发明授权Method for performing branch prediction and resolution of two or more branch instructions within two or more branch prediction buffers 失效用于在两个或更多个分支预测缓冲器内执行两个或多个分支指令的分支预测和分辨率的方法
公开(公告)号：US06157998A
公开(公告)日：2000-12-05
申请号：US54810
申请日：1998-04-03
CPC分类号： G06F9/3851 , G06F9/3844 , G06F9/3861
摘要： A branch prediction unit apparatus and method uses an instruction buffer (20), a completion unit (24), and a branch prediction unit (BPU) (28). The instruction buffer (20) and/or the completion unit (24) contain a plurality of instruction entries that contain valid bits and stream identifier (SID) bits. The branch prediction unit contains a plurality of branch prediction buffers (28a-28c). The SID bits are used to associate the pending and executing instructions in the units (20 and 24) into instruction streams related to predicted branches located in the buffers (28a-28c). The SID bits as well as age bits associated with the buffers (28a-28c) are used to perform efficient branch prediction, branch resolution/retirement, and branch misprediction recovery.
摘要翻译： 分支预测单元装置和方法使用指令缓冲器（20），完成单元（24）和分支预测单元（BPU）（28）。 指令缓冲器（20）和/或完成单元（24）包含包含有效位和流标识符（SID）位的多个指令条目。 分支预测单元包含多个分支预测缓冲器（28a-28c）。 SID位用于将单元（20和24）中的待执行和执行的指令与位于缓冲器（28a-28c）中的预测分支相关的指令流相关联。 SID位以及与缓冲器（28a-28c）相关联的老化位用于执行有效的分支预测，分支解决/退出和分支错误预测恢复。
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2.发明授权Apparatus and method for predicting multiple branches and performing out-of-order branch resolution 失效用于预测多个分支并执行无序分支分辨率的装置和方法公开(公告)号：US06477640B1
公开(公告)日：2002-11-05
申请号：US09659401
申请日：2000-09-11
IPC分类号： G06F1560
CPC分类号： G06F9/3851 , G06F9/3844 , G06F9/3861
摘要： A branch prediction unit apparatus and method uses an instruction buffer (20), a completion unit (24), and a branch prediction unit (BPU) (28). The instruction buffer (20) and/or the completion unit (24) contain a plurality of instruction entries that contain valid bits and stream identifier (SID) bits. The branch prediction unit contains a plurality of branch prediction buffers (28a-28c). The SID bits are used to associate the pending and executing instructions in the units (20 and 24) into instruction streams related to predicted branches located in the buffers (28a-28c). The SID bits as well as age bits associated with the buffers (28a-28c) are used to perform efficient branch prediction, branch resolution/retirement, and branch misprediction recovery.
摘要翻译： 分支预测单元装置和方法使用指令缓冲器（20），完成单元（24）和分支预测单元（BPU）（28）。 指令缓冲器（20）和/或完成单元（24）包含包含有效位和流标识符（SID）位的多个指令条目。 分支预测单元包含多个分支预测缓冲器（28a-28c）。 SID位用于将单元（20和24）中的待执行和执行的指令与位于缓冲器（28a-28c）中的预测分支相关的指令流相关联。 SID位以及与缓冲器（28a-28c）相关联的老化位用于执行有效的分支预测，分支解决/退出和分支错误预测恢复。
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