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    SELF-STRUCTURED MACHINE LEARNING CLASSIFIERS
    1.
    发明申请
    SELF-STRUCTURED MACHINE LEARNING CLASSIFIERS 有权

    公开(公告)号：US20210073686A1

    公开(公告)日：2021-03-11

    申请号：US16563036

    申请日：2019-09-06

    Applicant: Yuan Yuan Ding ,  GUO QIANG HU ,  Jun Zhu ,  Jing Chang Huang ,  Sheng Nan Zhu ,  Fan LI ,  Peng Ji

    Inventor： Yuan Yuan Ding ,  GUO QIANG HU ,  Jun Zhu ,  Jing Chang Huang ,  Sheng Nan Zhu ,  Fan LI ,  Peng Ji

    IPC: G06N20/20

    Abstract: Techniques for generating machine learning architectures are provided. A data set is received for training one or more machine learning (ML) models, where the data set comprises labeled exemplars for a plurality of classes. The data set is partitioned into a training set and a testing set. A first ML model is trained using the training set, and a quality of the first ML model with respect to each class of the plurality of classes is evaluated using the testing set. Upon determining that the quality of the first ML model is below a predefined threshold with respect to a first class and a second class of the plurality of classes, a subset of the training set is identified, where each exemplar in the subset corresponds to either the first class or the second class. A second ML model is trained using the subset of the training set.

    Dynamic pulse width modulation amplifiers
    2.
    发明授权
    Dynamic pulse width modulation amplifiers 失效
    动态脉宽调制放大器

    公开(公告)号：US07411447B2

    公开(公告)日：2008-08-12

    申请号：US11331095

    申请日：2006-01-13

    Applicant: Lin-Jing Chang

    Inventor： Lin-Jing Chang

    IPC: H03F3/38

    CPC classification number: H03F3/217

    Abstract: A dynamic pulse width modulation (PWM) amplifier comprising an input terminal, a dynamic PWM controller, a power stage, a low pass filter, and an output terminal. The input terminal receives an input signal. The dynamic PWM controller transforms the N-bit input signal sampled by a sampling frequency to a 1-bit PWM signal. The power stage receives and outputs the 1-bit PWM signal. The low pass filter receives and outputs the 1-bit PWM signal. The 1-bit PWM signal is used to drive the power stage and the low pass filter. The output terminal outputs the 1-bit PWM signal. The dynamic PWM amplifier is characterized in the dynamic PWM amplifier uses a register array to store the input signal processed immediately in each frame, regroups the input signal, and outputs the regroup signal, so that the 1-bit PWM signal is changed according to the input signal.

    Abstract translation: 一种动态脉宽调制（PWM）放大器，包括输入端，动态PWM控制器，功率级，低通滤波器和输出端。 输入端接收输入信号。 动态PWM控制器将采样频率采样的N位输入信号变换为1位PWM信号。 功率级接收并输出1位PWM信号。 低通滤波器接收并输出1位PWM信号。 1位PWM信号用于驱动功率级和低通滤波器。 输出端输出1位PWM信号。 动态PWM放大器的特点是动态PWM放大器使用寄存器阵列来存储每帧中立即处理的输入信号，重新分组输入信号，并输出重组信号，使得1位PWM信号根据 输入信号。

    Semiconductor structure and fabricating method thereof
    3.
    发明授权
    Semiconductor structure and fabricating method thereof 有权
    半导体结构及其制造方法

    公开(公告)号：US07288822B1

    公开(公告)日：2007-10-30

    申请号：US11399827

    申请日：2006-04-07

    Applicant: Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    Inventor： Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC classification number: H01L21/823814 ,  H01L21/823807 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

    Abstract: A semiconductor structure is disclosed, including a substrate having therein a first well of a first conductivity type and a second well of a second conductivity type, a first MOS transistor of the first conductivity type and a second MOS transistor of the second conductivity type. The first MOS transistor is disposed on the second well, including a gate structure on the second well and a strained layer of the first conductivity type in an opening in the second well beside the gate structure. The difference between the lattice parameter of a portion of the strained layer near the bottom of the opening and that of the substrate is less than the difference between the lattice parameter of a portion of the strained layer apart from the bottom of the opening and that of the substrate. The second MOS transistor is disposed on the first well.

    Abstract translation: 公开了一种半导体结构，包括其中具有第一导电类型的第一阱和第二导电类型的第二阱的衬底，第一导电类型的第一MOS晶体管和第二导电类型的第二MOS晶体管。 第一MOS晶体管设置在第二阱上，包括在第二阱上的栅极结构和位于栅极结构旁边的第二阱中的开口中的第一导电类型的应变层。 开口底部附近的应变层的一部分的晶格参数与基板的晶格参数之间的差异小于开口底部以外的应变层的一部分的晶格参数之间的差异， 底物。 第二MOS晶体管设置在第一阱上。

    Radiation measurement instrument calibration facility capable of lowering scattered radiation and shielding background radiation
    6.
    发明授权
    Radiation measurement instrument calibration facility capable of lowering scattered radiation and shielding background radiation 有权
    辐射测量仪器校准设备能够降低散射辐射和屏蔽背景辐射

    公开(公告)号：US08502134B2

    公开(公告)日：2013-08-06

    申请号：US13278666

    申请日：2011-10-21

    Applicant: Jeng-Hung Lee ,  Shi-Hwa Su ,  Bor-Jing Chang

    Inventor： Jeng-Hung Lee ,  Shi-Hwa Su ,  Bor-Jing Chang

    IPC: G01D18/00 ,  G21F5/00

    CPC classification number: G01T7/005

    Abstract: The present invention relates to a radiation measurement instrument calibration facility with the abilities of lowering scattered radiation and shielding background radiation and it is capable of providing a suitable environment for performing performance test, calibration and experiment upon a radiation measurement instrument. In an embodiment, the calibration facility comprises: a shielding device, a collimator, a multi-source irradiator, a radiation baffle, a carrier, an electric door unit and a control unit. With the design of the calibration facility of the present invention, the interference coming from the background radiation and scattered radiation in the laboratory during the radiation measurement instrument calibration can be effectively reduced to enhance the accuracy of measurement or calibration for the instrument, and also the instrument calibration and testing can be performed in radiation fields of low-, medium- and high-dose rate levels to meet the requirements of ISO 4037-1 (1996) Standard.

    Abstract translation: 本发明涉及具有降低散射辐射和屏蔽背景辐射的能力的辐射测量仪器校准设备，并且能够提供用于对辐射测量仪器执行性能测试，校准和实验的合适环境。 在一个实施例中，校准设备包括：屏蔽装置，准直器，多源辐射器，辐射挡板，载体，电动门单元和控制单元。 通过本发明的校准装置的设计，可以有效地减少辐射测量仪器校准期间来自实验室的背景辐射和散射辐射的干扰，以提高仪器的测量或校准精度， 仪器校准和测试可以在低，中，高剂量率的辐射领域进行，以满足ISO 4037-1（1996）标准的要求。

    Fabricating method of semiconductor structure
    7.
    发明授权
    Fabricating method of semiconductor structure 有权
    半导体结构的制造方法

    公开(公告)号：US07524716B2

    公开(公告)日：2009-04-28

    申请号：US11755669

    申请日：2007-05-30

    Applicant: Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    Inventor： Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    IPC: H01L21/336

    CPC classification number: H01L21/823814 ,  H01L21/823807 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

    Abstract: A semiconductor structure is disclosed, including a substrate having therein a first well of a first conductivity type and a second well of a second conductivity type, a first MOS transistor of the first conductivity type and a second MOS transistor of the second conductivity type. The first MOS transistor is disposed on the second well, including a gate structure on the second well and a strained layer of the first conductivity type in an opening in the second well beside the gate structure. The difference between the cell parameter of a portion of the strained layer near the bottom of the opening and that of the substrate is less than the difference between the cell parameter of a portion of the strained layer apart from the bottom of the opening and that of the substrate. The second MOS transistor is disposed on the first well.

    Abstract translation: 公开了一种半导体结构，包括其中具有第一导电类型的第一阱和第二导电类型的第二阱的衬底，第一导电类型的第一MOS晶体管和第二导电类型的第二MOS晶体管。 第一MOS晶体管设置在第二阱上，包括在第二阱上的栅极结构和位于栅极结构旁边的第二阱中的开口中的第一导电类型的应变层。 开口底部附近的应变层的一部分的单元参数与基板的单元参数之间的差值小于开口底部以外的应变层的一部分的单元参数之间的差， 底物。 第二MOS晶体管设置在第一阱上。

    SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF
    8.
    发明申请
    SEMICONDUCTOR STRUCTURE AND FABRICATING METHOD THEREOF 有权
    半导体结构及其制造方法

    公开(公告)号：US20070238241A1

    公开(公告)日：2007-10-11

    申请号：US11755669

    申请日：2007-05-30

    Applicant: Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    Inventor： Shyh-Fann Ting ,  Cheng-Tung Huang ,  Wen-Han Hung ,  Li-Shian Jeng ,  Kun-Hsien Lee ,  Tzyy-Ming Cheng ,  Jing-Chang Wu ,  Tzermin Shen

    IPC: H01L21/8238

    CPC classification number: H01L21/823814 ,  H01L21/823807 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

    Abstract: A semiconductor structure is disclosed, including a substrate having therein a first well of a first conductivity type and a second well of a second conductivity type, a first MOS transistor of the first conductivity type and a second MOS transistor of the second conductivity type. The first MOS transistor is disposed on the second well, including a gate structure on the second well and a strained layer of the first conductivity type in an opening in the second well beside the gate structure. The difference between the cell parameter of a portion of the strained layer near the bottom of the opening and that of the substrate is less than the difference between the cell parameter of a portion of the strained layer apart from the bottom of the opening and that of the substrate. The second MOS transistor is disposed on the first well.

    Abstract translation: 公开了一种半导体结构，包括其中具有第一导电类型的第一阱和第二导电类型的第二阱的衬底，第一导电类型的第一MOS晶体管和第二导电类型的第二MOS晶体管。 第一MOS晶体管设置在第二阱上，包括在第二阱上的栅极结构和位于栅极结构旁边的第二阱中的开口中的第一导电类型的应变层。 开口底部附近的应变层的一部分的单元参数与基板的单元参数之间的差异小于与开口底部之间的应变层的一部分的单元参数之间的差， 底物。 第二MOS晶体管设置在第一阱上。

    Dynamic pulse width modulation amplifiers
    10.
    发明申请
    Dynamic pulse width modulation amplifiers 失效
    动态脉宽调制放大器

    公开(公告)号：US20060158248A1

    公开(公告)日：2006-07-20

    申请号：US11331095

    申请日：2006-01-13

    Applicant: Lin-Jing Chang

    Inventor： Lin-Jing Chang

    IPC: H03F3/38

    CPC classification number: H03F3/217

    Abstract: A dynamic pulse width modulation (PWM) amplifier comprising an input terminal, a dynamic PWM controller, a power stage, a low pass filter, and an output terminal. The input terminal receives an input signal. The dynamic PWM controller transforms the N-bit input signal sampled by a sampling frequency to a 1-bit PWM signal. The power stage receives and outputs thel-bit PWM signal. The low pass filter receives and outputs the 1-bit PWM signal. The 1-bit PWM signal is used to drive the power stage and the low pass filter. The output terminal outputs the 1-bit PWM signal. The dynamic PWM amplifier is characterized in the dynamic PWM amplifier uses a register array to store the input signal processed immediately in each frame, regroups the input signal, and outputs the regroup signal, so that the 1-bit PWM signal is changed according to the input signal.

    Abstract translation: 一种动态脉宽调制（PWM）放大器，包括输入端，动态PWM控制器，功率级，低通滤波器和输出端。 输入端接收输入信号。 动态PWM控制器将采样频率采样的N位输入信号变换为1位PWM信号。 功率级接收并输出1位PWM信号。 低通滤波器接收并输出1位PWM信号。 1位PWM信号用于驱动功率级和低通滤波器。 输出端输出1位PWM信号。 动态PWM放大器的特点是动态PWM放大器使用寄存器阵列来存储每帧中立即处理的输入信号，重新分组输入信号，并输出重组信号，使得1位PWM信号根据 输入信号。

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