公开(公告)号：US09269758B2

公开(公告)日：2016-02-23

申请号：US13005681

申请日：2011-01-13

申请人： Jing-Hwang Yang ,  Chun-Heng Liao ,  Hsin-Li Cheng ,  Liang-Kai Han

发明人： Jing-Hwang Yang ,  Chun-Heng Liao ,  Hsin-Li Cheng ,  Liang-Kai Han

IPC分类号： H01L29/40 ,  H01L49/02 ,  H01L27/06 ,  H01L27/08

CPC分类号： H01L28/20 ,  H01L27/0629 ,  H01L27/0802

摘要： The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.

摘要翻译： 本公开涉及一种方法。 该方法包括提供包括顶表面的基底。 该方法还包括在衬底的顶表面上形成栅极。 形成的栅极具有从基板的顶表面测量的第一高度。 该方法还包括蚀刻栅极以将栅极减小到第二高度。 该第二高度明显小于第一高度。 本公开还涉及半导体器件。 半导体器件包括衬底。 衬底包括顶表面。 半导体器件还包括形成在衬底顶表面上的第一栅极。 第一个门有一个第一高度。 半导体器件还包括形成在衬底顶表面上的第二栅极。 第二个门有第二个高度。 第一高度大致小于第二高度。

公开(公告)号：US20120181612A1

公开(公告)日：2012-07-19

申请号：US13005681

申请日：2011-01-13

申请人： Jing-Hwang Yang ,  Chun-Heng Liao ,  Hsin-Li Cheng ,  Liang-Kai Han

发明人： Jing-Hwang Yang ,  Chun-Heng Liao ,  Hsin-Li Cheng ,  Liang-Kai Han

IPC分类号： H01L29/40 ,  H01L21/3205

CPC分类号： H01L28/20 ,  H01L27/0629 ,  H01L27/0802

摘要： The present disclosure involves a method. The method includes providing a substrate including a top surface. The method also includes forming a gate over the top surface of the substrate. The formed gate has a first height measured from the top surface of the substrate. The method also includes etching the gate to reduce the gate to a second height. This second height is substantially less than the first height. The present disclosure also involves a semiconductor device. The semiconductor device includes a substrate. The substrate includes a top surface. The semiconductor device also includes a first gate formed over the top surface of the substrate. The first gate has a first height. The semiconductor device also includes a second gate formed over the top surface of the substrate. The second gate has a second height. The first height is substantially less than the second height.

摘要翻译： 本公开涉及一种方法。 该方法包括提供包括顶表面的基底。 该方法还包括在衬底的顶表面上形成栅极。 形成的栅极具有从基板的顶表面测量的第一高度。 该方法还包括蚀刻栅极以将栅极减小到第二高度。 该第二高度明显小于第一高度。 本公开还涉及半导体器件。 半导体器件包括衬底。 衬底包括顶表面。 半导体器件还包括形成在衬底顶表面上的第一栅极。 第一个门有一个第一高度。 半导体器件还包括形成在衬底顶表面上的第二栅极。 第二个门有第二个高度。 第一高度大致小于第二高度。