公开(公告)号：US5233631A

公开(公告)日：1993-08-03

申请号：US711191

申请日：1991-06-06

Applicant: Joel Labat ,  Dominique Leroux ,  Patrick Vandamme

Inventor： Joel Labat ,  Dominique Leroux ,  Patrick Vandamme

IPC: H04L27/38 ,  H04L27/00 ,  H04L27/227

CPC classification number: H04L27/2273 ,  H04L2027/003 ,  H04L2027/0042 ,  H04L2027/0053 ,  H04L2027/0069

Abstract: The invention concerns a device for recovering a carrier wave provided with a circuit for inhibiting dummy frequency hookings or acquisitions for phase-modulated digital signals in N states with a phase N=2P, device including a phase locking loop provided with demodulation, a voltage-controllable oscillator, a 90.degree. phase shifter, for the low-pass filtering of basic band signals X1(t) and Y1(t), a loop filter, for sampling the signals X1(t) and Y1(t) and having a sampling frequency Fe so that Fe>(2p+1.vertline.n.vertline.)/T where T is the reciprocal value of the modulation speed and, associated with this loop, a circuit for drawing up the filtered signals Sign Sin (2P .PHI.k) and Sign Cos (2P .PHI.k) required for detection of the direction of variation of the phase error, a phase/frequency comparator, loss of synchronization and hooking detection and an adaptive filter.

Abstract translation: 本发明涉及一种用于恢复载波的装置，该载波具有用于禁止用于N相状态的N个状态的相位调制数字信号的虚拟频率挂接或采集的电路，所述相位调制数字信号具有相位N = 2P，该装置包括具有解调的锁相环， 可控振荡器，90°移相器，用于对基本频带信号X1（t）和Y1（t）进行低通滤波，一个环路滤波器，用于对信号X1（t）和Y1（t）进行采样，并具有采样 频率Fe，使得Fe>（2p + 1|n|）/ T其中T是调制速度的倒数，并且与该环路相关联用于绘制滤波信号的电路Sign Sin（2P PHI k）和Sign 检测相位误差变化方向所需的Cos（2P PHI k），相位/频率比较器，同步丢失和钩状检测以及自适应滤波器。

公开(公告)号：US5909466A

公开(公告)日：1999-06-01

申请号：US793539

申请日：1997-02-07

Applicant: Joel Labat ,  Christophe Laot ,  Odile Macchi

Inventor： Joel Labat ,  Christophe Laot ,  Odile Macchi

IPC: H04L27/01 ,  H04B3/06 ,  H04L25/03 ,  H04L27/22 ,  H03H7/30

CPC classification number: H04L25/0305 ,  H04L25/03057 ,  H04L2025/03566 ,  H04L2025/03662

Abstract: The equalizer circuit for the receiver of a digital communications system is characterized in that its predictor (11) is purely recursive, its phase equalizer (12) is purely transversal, and the relative positions of those two elements are interchangeable, means for evaluating performance in terms of decision error and for causing the two elements to be interchanged in application of a criterion for evaluating the difficulty of reception, the predictor being upstream and optimized in adaptive and self-learning manner to whiten its own output while the phase equalizer (12) is downstream and optimized in adaptive manner during periods of difficult reception, whereas the predictor (11) is downstream and the phase equalizer (12) is upstream, both being optimized jointly in adaptive manner to minimize decision error between the output (d(n)) of the decision circuit (2) and its input (w(n) or y(n)) during periods of easy reception. The predictor (11) is then preferably fed with estimated data, so that the circuit thus becomes recursive and non-linear (DFE).

Abstract translation: PCT No.PCT / FR96 / 01417 Sec。 371日期1997年2月7日 102（e）1997年2月7日PCT PCT 1996年9月13日PCT公布。 出版物WO97 / 10664 日期1997年3月20日数字通信系统的接收机的均衡器电路的特征在于其预测器（11）是纯递归的，其相位均衡器（12）是纯横向的，并且这两个元件的相对位置是可互换的， 用于在决策误差方面评估性能的手段，以及在应用用于评估接收难度的标准的情况下使两个要素互换，预测器以自适应和自学习方式上游并优化，以使其自身的输出变白 相位均衡器（12）是在接收困难期间以自适应方式进行下行并优化的，而预测器（11）是下游，相位均衡器（12）是上行的，两者都以自适应方式联合优化，以最小化输出 （2）的判定电路（+ E，cir d + EE（n））及其输入（w（n）或y（n））。 预测器（11）然后优选地馈送有估计数据，使得电路变为递归和非线性（DFE）。

公开(公告)号：US07561647B2

公开(公告)日：2009-07-14

申请号：US10471139

申请日：2002-03-05

Applicant: Christophe Laot ,  Joel Labat

Inventor： Christophe Laot ,  Joel Labat

IPC: H04B1/10

CPC classification number: H04L1/005 ,  H04L1/0048 ,  H04L1/0071 ,  H04L25/03057 ,  H04L25/03171

Abstract: The invention relates to a channel equalizing and decoding device consisting of a series of modules, each of which comprises an equalizer (10) and a decoder with weighted output (20). The modules of rank higher than 1 receive (i) a sequence of samples coming from a sensor and delayed by a value equal to the processing time of preceding modules and (ii) the output from the preceding module. Said invention is characterized in that each of the modules comprises means for receiving at least two different sequences of samples and an equalizer that can determine one same equalized sequence of samples using the aforementioned minimum two sequences received as two different non-equalized representations of the sequence of samples to be determined.

Abstract translation: 本发明涉及一种由一系列模块组成的信道均衡和解码装置，每个模块包括均衡器（10）和具有加权输出（20）的解码器。 等级高于1的模块接收（i）来自传感器的一系列样本，并延迟等于先前模块的处理时间的值，（ii）前一模块的输出。 所述发明的特征在于，每个模块包括用于接收至少两个不同样本序列的装置和均衡器，该均衡器可以使用作为序列的两个不同非均衡表示接收的前述最小两个序列来确定一个相同的均衡序列 的样品要确定。