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公开(公告)号:US4827084A
公开(公告)日:1989-05-02
申请号:US122990
申请日:1987-11-19
申请人: Zvi Yaniv , Clive Catchpole , Vincent D. Cannella , John C. McGill , Mike Prewarski , Ronald G. Mulberger
发明人: Zvi Yaniv , Clive Catchpole , Vincent D. Cannella , John C. McGill , Mike Prewarski , Ronald G. Mulberger
CPC分类号: G06F3/0412 , G06F3/033 , G06F3/045 , G09B5/14
摘要: A solid state, touch sensitive position sensor, which sensor includes a conductive surface along the boundaries of which are disposed at least two sets of two elongated current distribution and collection means. The touch sensitive position sensor further includes resistance means operatively disposed so as to interconnect said current distribution and collection means with said conductive surface. The current distribution and collection means and resistance means are configured, so as to (1) provide a substantially linear electric field distribution of equipotential lines and (2) sequentially turn one set of said current distribution and collection means on while turning the other sets off. In an important embodiment, the conductive surface is formed immediately atop a copyboard and by utilizing erasable, felt tip markers having metallic inserts therein, visual images as well as electrical signals, indicative of X-Y coordinate location, may be simultaneously generated.
摘要翻译: 一种固态触敏位置传感器,该传感器包括沿其边界的导电表面设置至少两组两个细长的电流分布和收集装置。 触敏位置传感器还包括可操作地设置成将所述电流分布和收集装置与所述导电表面相互连接的电阻装置。 配置电流分布和收集装置和电阻装置,以便(1)提供等电位线的基本上线性的电场分布,以及(2)在转动另一组时依次转动一组所述电流分配和收集装置 。 在一个重要的实施例中,导电表面立即形成在电子白板的顶部,并且通过利用其中具有金属插入物的可擦除的毛毡尖端标记,可以同时产生指示X-Y坐标位置的视觉图像以及电信号。
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公开(公告)号:US4680085A
公开(公告)日:1987-07-14
申请号:US851756
申请日:1986-04-14
申请人: Meera Vijan , John C. McGill , Paul N. Day
发明人: Meera Vijan , John C. McGill , Paul N. Day
IPC分类号: H01L21/3213 , H01L21/77 , H01L21/84 , H01L21/306 , B44C1/22 , C03C15/00 , C23F1/02
CPC分类号: H01L21/32137 , H01L27/1214 , Y10S438/963
摘要: Thin film semiconductor devices such as amorphous silicon alloy p-i-n diodes and the like which utilize mesa-like semiconductor structures having vertical sidewalls are formed by a process which eliminates overhangs and neutralizes contaminants on the sidewalls that can result in short circuits or degradation of device performance. Smooth vertical sidewalls free of overhangs and voids are created by: successively depositing the desired semiconductor layers on a substrate, then depositing and patterning a top metal contact mask on the semiconductor layers, followed by removing the unwanted portions of the semiconductor layers by reactive ion etching. The disclosed reactive ion etching provides controlled vertical etching with virtually no lateral etching, thereby providing smooth sidewalls. The top metal contact mask protects the underlying semiconductor layers during the anisotropic etching process, and its edges are precisely aligned with the sidewalls of the underlying semiconductor layers that define the mesa structure when the etching is complete. The top metal contact mask which is formed by conventional deposition and patterning techniques, serves as a connection between the metal electrode which connects semiconductor layers of the mesa structure to the top metallization which is patterned to define desired interconnections. Ion damage and contaminants formed on the sidewalls during etching are removed or neutralized by contacting the sidewalls with a base solution and/or annealing the mesa structure before it is covered with an insulation layer.
摘要翻译: 利用具有垂直侧壁的台面状半导体结构的诸如非晶硅合金p-i-n二极管等的薄膜半导体器件通过消除悬垂并中和侧壁上的污染物的过程形成,这可能导致器件性能的短路或劣化。 没有突出端和空隙的平滑垂直侧壁通过以下方式产生:依次在衬底上沉积所需的半导体层,然后在半导体层上沉积和图案化顶部金属接触掩模,然后通过反应离子蚀刻去除半导体层的不希望的部分 。 所公开的反应离子蚀刻提供受控的垂直蚀刻,实际上没有横向蚀刻,从而提供平滑的侧壁。 顶部金属接触掩模在各向异性蚀刻工艺期间保护下面的半导体层,并且当蚀刻完成时,其边缘与限定台面结构的下面的半导体层的侧壁精确对准。 通过常规沉积和图案化技术形成的顶部金属接触掩模用作将台面结构的半导体层与顶部金属化连接的金属电极之间的连接,其被图案化以限定所需的互连。 在蚀刻期间在侧壁上形成的离子损伤和污染通过使侧壁与基底溶液接触和/或在其被绝缘层覆盖之前退火台面结构而被去除或中和。
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