公开(公告)号：US20090146979A1

公开(公告)日：2009-06-11

申请号：US12330420

申请日：2008-12-08

申请人： Ali NOORBAKHSH ,  David KEENE ,  John LATTANZI ,  Ram CHILUKURI

发明人： Ali NOORBAKHSH ,  David KEENE ,  John LATTANZI ,  Ram CHILUKURI

IPC分类号： G09G5/00

CPC分类号： G09G3/3696 ,  G09G3/2096 ,  G09G5/006 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2330/022

摘要： Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active

摘要翻译： 通过确定参考时钟信号（TCLK）是否正在切换以及如果参考时钟信号正在切换，通过自动活动检测电路来检测板载电源何时通电或断电，然后在电容器中将电容器充电到高电压 基于切换参考时钟信号的自动活动检测电路，并且通过自动活动检测电路基于高电压输出表示车载电源是否活动的车载电源活动信号

公开(公告)号：US20060085627A1

公开(公告)日：2006-04-20

申请号：US11061165

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G06F15/177

CPC分类号： G09G5/363 ,  G09G5/001 ,  G09G2330/021 ,  G09G2360/125 ,  G09G2370/047

摘要： A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

摘要翻译： 一种显示控制器，其通过显示接口耦合到显示设备，并且通过数据端口耦合到主机设备，所述数据端口包括被配置为处理可执行指令和相关联的数据的处理器，用于存储可执行指令和相关数据的单个存储器设备 和EDID，以及桥接部分，其通过所述数据端口将所述单个存储器件耦合到所述主机设备，其中所述桥接部分总是处于通电状态，从而由所述主机提供对所述单个存储器设备的访问 即使当显示控制器处于断电状态时，例如在显示控制器处于断电状态的引导过程中。

公开(公告)号：US07911475B2

公开(公告)日：2011-03-22

申请号：US11061151

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G06F12/02 ,  G09G5/36

CPC分类号： G09G5/006 ,  G09G2330/021 ,  G09G2370/047

摘要： A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

摘要翻译： 一种显示控制器，其通过显示接口耦合到显示设备，并且通过数据端口耦合到主机设备，所述数据端口包括被配置为处理可执行指令和相关联的数据的处理器，用于存储可执行指令和相关数据的单个存储器设备 和EDID，以及桥接部分，其通过所述数据端口将所述单个存储器件耦合到所述主机设备，其中所述桥接部分总是处于通电状态，从而由所述主机提供对所述单个存储器设备的访问 即使当显示控制器处于断电状态时，例如在显示控制器处于断电状态的引导过程中。

公开(公告)号：US06459426B1

公开(公告)日：2002-10-01

申请号：US09135216

申请日：1998-08-17

申请人： Alexander Julian Eglit ,  Tzoyao Chan ,  John Lattanzi

发明人： Alexander Julian Eglit ,  Tzoyao Chan ,  John Lattanzi

IPC分类号： H03M112

CPC分类号： B60R25/102 ,  B60R25/1018 ,  B60R25/2009 ,  B60R2325/304 ,  B60R2325/306 ,  B62H5/00 ,  B62H5/20

摘要： A monolithic integrated circuit for use in a digital display unit. The circuit may include an analog-to-digital converter (ADC), a scaler and a clock recovery circuit. The present invention enables the integration of at least these components into a single monolithic integrated circuit while maintaining reasonable display quality. Specifically, the monolithic integrated circuit is designed for substantial immunity from noise, which may otherwise result from integration.

摘要翻译： 一种用于数字显示单元的单片集成电路。 电路可以包括模数转换器（ADC），缩放器和时钟恢复电路。 本发明使得至少将这些组件集成到单个单片集成电路中同时保持合理的显示质量。 具体地，单片集成电路被设计用于实质上抗噪声的抗扰性，否则这可能由集成引起。

公开(公告)号：US07911473B2

公开(公告)日：2011-03-22

申请号：US11061165

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G09G5/39 ,  G06T1/60

CPC分类号： G09G5/363 ,  G09G5/001 ,  G09G2330/021 ,  G09G2360/125 ,  G09G2370/047

摘要： A display controller coupled to a display device by way of a display interface and to a host device by way of a data port that includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device, and a bridge portion coupling the single memory device to the host device by way of the data port, wherein the bridge portion is always in a powered on state thereby providing access to the single memory device by the host device even when the display controller is in a powered off state such as during a boot up process when the display controller is in the powered off state.

摘要翻译： 一种显示控制器，其通过显示接口耦合到显示设备，并且通过数据端口耦合到主机设备，所述数据端口包括被配置为处理可执行指令和相关联的数据的处理器，用于存储可执行指令和相关数据的单个存储器设备 和EDID，以及桥接部分，其通过所述数据端口将所述单个存储器件耦合到所述主机设备，其中所述桥接部分总是处于通电状态，从而由所述主机提供对所述单个存储器设备的访问 即使当显示控制器处于断电状态时，例如在显示控制器处于断电状态的引导过程中。

公开(公告)号：US07477244B2

公开(公告)日：2009-01-13

申请号：US11061228

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G09G5/00

CPC分类号： G09G3/3696 ,  G09G3/2096 ,  G09G5/006 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2330/022

摘要： Detecting when the on-board power supply is powered on or off by an auto activity detection circuit by determining if the reference clock signal (TCLK) is toggling and if the reference clock signal is toggling, then charging a capacitor to a high voltage in the auto activity detection circuit based on the toggling reference clock signal, and outputting an on-board power supply activity signal based upon the high voltage by the auto activity detection circuit indicative of whether or not the on-board power supply is active.

摘要翻译： 通过确定参考时钟信号（TCLK）是否正在切换以及如果参考时钟信号正在切换，通过自动活动检测电路来检测板载电源何时通电或断电，然后在电容器中将电容器充电到高电压 基于切换参考时钟信号的自动活动检测电路，并且通过表示车载电源是否活动的自动活动检测电路基于高电压输出板载电源活动信号。

公开(公告)号：US20060082584A1

公开(公告)日：2006-04-20

申请号：US11060862

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G09G5/39

CPC分类号： G09G5/006 ,  G09G2370/047

摘要： In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an 12C data bus each coupled to a host device, a method of transferring EDID from the memory device over the 12C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.

摘要翻译： 在具有被配置为处理可执行指令和相关联的数据的处理器的VESA标准兼容显示控制器中，布置成存储EDID和可执行指令和相关数据的存储器设备，通过12C数据耦合到存储器设备的多个数据端口 每个都耦合到主机设备的一个总线，一种通过12C数据总线将EDID从存储器件传送到请求的一个数据端口的方法，同时服务于没有时钟延伸的处理器存储器访问请求。

公开(公告)号：US20060082586A1

公开(公告)日：2006-04-20

申请号：US11060873

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G06F13/18

CPC分类号： G06F13/1605 ,  G09G5/001 ,  G09G5/006 ,  G09G2370/047

摘要： A display controller includes a processor arranged to process executable instructions and associated data, a single memory device for storing the executable instructions and associated data and EDID corresponding to the display device that is always available for access by the data ports and/or the processor regardless of a power state of the display controller, a data buffer for storing EDID read from the memory device, and an arbitration circuit for arbitrating memory device access requests between the processor and a requesting data port wherein when the data buffer is not almost empty, then the arbitration circuit grants the processor access to the memory wherein when the data buffer is almost empty, then the arbitration circuit grants only the requesting data port access to them memory so as to replenish the data buffer with read EDID.

摘要翻译： 显示控制器包括处理器，其被配置为处理可执行指令和相关联的数据;单个存储器设备，用于存储与数据端口和/或处理器总是可访问的显示设​​备对应的可执行指令和相关联的数据以及EDID 显示控制器的电源状态，用于存储从存储器件读取的EDID的数据缓冲器以及仲裁电路，用于仲裁处理器与请求数据端口之间的存储器件访问请求，其中当数据缓冲器几乎不为空时，则 仲裁电路授予处理器对存储器的访问，其中当数据缓冲器几乎为空时，仲裁电路仅授权请求数据端口访问它们的存储器，以便用读取的EDID补充数据缓冲器。

公开(公告)号：US20060082570A1

公开(公告)日：2006-04-20

申请号：US11061249

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G09G5/00

CPC分类号： G09G5/006 ,  G09G2330/02 ,  G09G2370/047

摘要： A video controller having a processor for processing executable instructions and associated data and a number of data ports, a method of acquiring extended display identification data (EDID) by a requesting one of the data ports is described. When on-board power supply is activated, an off-board power supply is deactivated and then the now active on-board power supply provides power to a memory device used to store the EDID and the executable instructions and associated data and to an on-board clock circuit capable of providing a high frequency clock signal. The on-board clock circuit, in turn, provides the high frequency clock signal from the on-board clock circuit to the memory device and if a memory read operation had been in progress when the on-board power supply was activated, then the memory read operation is completed.

摘要翻译： 一种具有处理器的视频控制器，用于处理可执行指令和相关数据以及多个数据端口，描述了通过请求数据端口获取扩展显示标识数据（EDID）的方法。 当机载电源被激活时，非机载电源被禁用，然后现在有效的板载电源为用于存储EDID和可执行指令和相关数据的存储设备提供电力， 板时钟电路能够提供高频时钟信号。 板载时钟电路又提供从板载时钟电路到存储器件的高频时钟信号，并且如果在板上电源被激活时存储器读取操作已经进行，则存储器 读操作完成。

公开(公告)号：US20060082569A1

公开(公告)日：2006-04-20

申请号：US11060917

申请日：2005-02-18

申请人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

发明人： Ali Noorbakhsh ,  David Keene ,  John Lattanzi ,  Ram Chilukuri

IPC分类号： G09G5/00

CPC分类号： G09G5/006 ,  G09G2330/02 ,  G09G2370/047

摘要： Managing power in a display controller having an on-board power supply coupled to a host device having an off-board power supply by way of a connector is described. If the on-board power supply is active, then power is supplied to the display controller by the off-board power supply by way of the connector and a low frequency clock arranged to provide a low frequency clock signal is turned on. Alternatively, when it is determined that the on-board power supply is active, then power is supplied to the display controller by the on-board power supply only, the low frequency clock is turned off and a high frequency clock arranged to provide a high frequency clock signal is turned on.