Capacitive sensing
    1.
    发明授权
    Capacitive sensing 有权
    电容传感

    公开(公告)号:US09531380B2

    公开(公告)日:2016-12-27

    申请号:US13537986

    申请日:2012-06-29

    摘要: A multi-channel capacitive sensor comprises a sample capacitor having first and second terminals, a first diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a first sense electrode, and a second diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a second sense electrode. The sample capacitor and diodes are coupled to a control circuit. The control circuit is operable to apply a drive signal to the first terminal of the sample capacitor while simultaneously applying a bias signal to the second terminal of one or other of the diodes to prevent the diode from conducting the drive signal.

    摘要翻译: 多通道电容传感器包括具有第一和第二端子的采样电容器,具有耦合到采样电容器的第二端子的第一端子的第一二极管和耦合到第一感测电极的第二端子,以及具有第一 端子,其耦合到所述采样电容器的第二端子,以及耦合到第二感测电极的第二端子。 采样电容器和二极管耦合到控制电路。 控制电路可操作以将驱动信号施加到采样电容器的第一端子,同时向一个或另一个二极管的第二端子施加偏置信号,以防止二极管导通驱动信号。

    Combined accumulator and maximum/minimum comparator
    2.
    发明授权
    Combined accumulator and maximum/minimum comparator 有权
    组合累加器和最大/最小比较器

    公开(公告)号:US09046942B2

    公开(公告)日:2015-06-02

    申请号:US13486562

    申请日:2012-06-01

    摘要: In one embodiment, a method comprises detecting, by a hardware accelerator, that a value has been written to a first location of a memory, the first location identified by a first address. The method further includes adding the value to an accumulated value stored in an accumulator register of the hardware accelerator and storing the result in the accumulator register. The method further includes comparing the value to a maximum value stored in a first register of the hardware accelerator and overwriting the maximum value with the value if the value is greater than the maximum value. The method also includes comparing the value to a minimum value stored in a second register of the hardware accelerator and overwriting the minimum value with the value if the value is less than the minimum value.

    摘要翻译: 在一个实施例中,一种方法包括通过硬件加速器检测已经将值写入存储器的第一位置,第一位置由第一地址识别。 该方法还包括将值加到存储在硬件加速器的累加器寄存器中的累加值,并将结果存储在累加器寄存器中。 所述方法还包括将所述值与所述硬件加速器的第一寄存器中存储的最大值进行比较,并且如果所述值大于所述最大值,则用所述值重写所述最大值。 该方法还包括将该值与存储在硬件加速器的第二寄存器中的最小值进行比较,并且如果该值小于该最小值,则用该值重写该最小值。

    Combined Accumulator and Maximum/Minimum Comparator
    4.
    发明申请
    Combined Accumulator and Maximum/Minimum Comparator 有权
    组合式累加器和最大/最小比较器

    公开(公告)号:US20130321289A1

    公开(公告)日:2013-12-05

    申请号:US13486562

    申请日:2012-06-01

    IPC分类号: G06F3/041

    摘要: In one embodiment, a method comprises detecting, by a hardware accelerator, that a value has been written to a first location of a memory, the first location identified by a first address. The method further includes adding the value to an accumulated value stored in an accumulator register of the hardware accelerator and storing the result in the accumulator register. The method further includes comparing the value to a maximum value stored in a first register of the hardware accelerator and overwriting the maximum value with the value if the value is greater than the maximum value. The method also includes comparing the value to a minimum value stored in a second register of the hardware accelerator and overwriting the minimum value with the value if the value is less than the minimum value.

    摘要翻译: 在一个实施例中,一种方法包括通过硬件加速器检测已经将值写入存储器的第一位置,第一位置由第一地址识别。 该方法还包括将值加到存储在硬件加速器的累加器寄存器中的累加值,并将结果存储在累加器寄存器中。 所述方法还包括将所述值与所述硬件加速器的第一寄存器中存储的最大值进行比较,并且如果所述值大于所述最大值,则用所述值重写所述最大值。 该方法还包括将该值与存储在硬件加速器的第二寄存器中的最小值进行比较,并且如果该值小于该最小值,则用该值重写该最小值。

    Capacitive sensing
    5.
    发明授权
    Capacitive sensing 有权
    电容传感

    公开(公告)号:US08237456B2

    公开(公告)日:2012-08-07

    申请号:US12395880

    申请日:2009-03-02

    IPC分类号: G01R27/26

    摘要: In certain embodiments, a multi-channel capacitive sensor for measuring capacitances of sense electrodes to a system reference potential comprises a sample capacitor having first and second terminals. The sensor comprises a first diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a first sense electrode, and comprises a second diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a second sense electrode. A control circuit is operable to apply a drive signal to the first terminal of the sample capacitor and apply a bias signal to the respective second terminals of at least one of the first and second diodes so as to selectively prevent the at least one of the first and second diodes from conducting the drive signal to respectively connected sense electrodes.

    摘要翻译: 在某些实施例中,用于测量感测电极到系统参考电位的电容的多通道电容传感器包括具有第一和第二端子的采样电容器。 传感器包括第一二极管,其具有耦合到采样电容器的第二端子的第一端子和耦合到第一感测电极的第二端子,并且包括具有耦合到采样电容器的第二端子的第一端子的第二二极管和 第二端子耦合到第二感测电极。 控制电路可操作以将驱动信号施加到采样电容器的第一端,并将偏置信号施加到第一和第二二极管中的至少一个二极管的相应第二端子,以便选择性地防止第一和第二二极管中的至少一个 以及第二二极管,将驱动信号传导到分别连接的检测电极。

    Capacitive Sensing
    9.
    发明申请
    Capacitive Sensing 有权
    电容式感应

    公开(公告)号:US20130002269A1

    公开(公告)日:2013-01-03

    申请号:US13537986

    申请日:2012-06-29

    IPC分类号: G01R27/26

    摘要: A multi-channel capacitive sensor comprises a sample capacitor having first and second terminals, a first diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a first sense electrode, and a second diode having a first terminal coupled to the second terminal of the sample capacitor and a second terminal coupled to a second sense electrode. The sample capacitor and diodes are coupled to a control circuit. The control circuit is operable to apply a drive signal to the first terminal of the sample capacitor while simultaneously applying a bias signal to the second terminal of one or other of the diodes to prevent the diode from conducting the drive signal.

    摘要翻译: 多通道电容传感器包括具有第一和第二端子的采样电容器,具有耦合到采样电容器的第二端子的第一端子的第一二极管和耦合到第一感测电极的第二端子,以及具有第一 端子,其耦合到所述采样电容器的第二端子,以及耦合到第二感测电极的第二端子。 采样电容器和二极管耦合到控制电路。 控制电路可操作以将驱动信号施加到采样电容器的第一端子,同时向一个或另一个二极管的第二端子施加偏置信号,以防止二极管导通驱动信号。