Resistor structures to electrically measure unidirectional misalignment of stitched masks
    3.
    发明申请
    Resistor structures to electrically measure unidirectional misalignment of stitched masks 有权
    用于电测量缝合掩模的单向未对准的电阻结构

    公开(公告)号:US20060060843A1

    公开(公告)日:2006-03-23

    申请号:US10537952

    申请日:2003-12-04

    申请人: Joseph Amato

    发明人: Joseph Amato

    IPC分类号: H01L29/10

    摘要: An apparatus and method for matched variable resistor structures to electrically measure unidirectional misalignment of stitched masks for etched interconnect layers includes a first test pad (101) and a second test pad (102) for measuring resistance therebetween; a first resistive element (105) electrically connected at a first end to the first test pad (101); and, a second resistive element (110) electrically connected at a first end to the second test pad (102). The first resistive element and the second resistive element are electrically connected by a vertical offset (112). The resistance measured between the first test pad and the second test pad is variable in accordance with an alignment of the first resistive element and the second resistive element relative to the vertical offset, see FIG. 1C-E. An indicator may optionally provide an indication that the resistive elements are in alignment.

    摘要翻译: 用于电测量用于蚀刻互连层的缝合掩模的单向未对准的匹配可变电阻器结构的装置和方法包括用于测量它们之间的电阻的第一测试焊盘(101)和第二测试焊盘(102) 在第一端电连接到第一测试垫(101)的第一电阻元件(105); 以及在第一端电连接到第二测试垫(102)的第二电阻元件(110)。 第一电阻元件和第二电阻元件通过垂直偏移(112)电连接。 在第一测试焊盘和第二测试焊盘之间测量的电阻根据第一电阻元件和第二电阻元件相对于垂直偏移的对准而变化,参见图3。 1 C-E。 指示符可以可选地提供电阻元件对准的指示。

    Offset dependent resistor for measuring misalignment of stitched masks
    4.
    发明申请
    Offset dependent resistor for measuring misalignment of stitched masks 有权
    偏移相关电阻,用于测量拼接掩模的不对中

    公开(公告)号:US20070030335A1

    公开(公告)日:2007-02-08

    申请号:US10567173

    申请日:2004-06-25

    申请人: Joseph Amato

    发明人: Joseph Amato

    IPC分类号: B41J2/435

    摘要: A system and method for identifying misalignments in an overlapping region of a stitched circuit in an integrated circuit fabrication process. The method comprises: creating a first circuit using a reference mask, wherein first circuit includes a first part of an offset dependent resistor structure in the overlapping region; creating a second circuit using a secondary mask, wherein the second circuit includes a second part of the offset dependent resistor structure in the overlapping region, wherein the offset dependent resistor structure includes a plurality of nubs that interconnect the first part and the second part of theis offset dependent resistor structure; measuring a resistance across the offset dependent resistor structure; and determining an amount of misalignment based on the measured resistance.

    摘要翻译: 一种用于在集成电路制造工艺中识别缝合电路的重叠区域中的未对准的系统和方法。 该方法包括:使用参考掩模创建第一电路,其中第一电路包括重叠区域中偏移相关电阻器结构的第一部分; 使用次级掩模创建第二电路,其中第二电路包括重叠区域中的偏移相关电阻器结构的第二部分,其中偏移相关电阻器结构包括互连第一部分和第二部分的多个连接点 偏移相关电阻结构; 测量偏移相关电阻结构上的电阻; 以及基于所测量的电阻确定不对准量。