公开(公告)号：US06294447B1

公开(公告)日：2001-09-25

申请号：US09351971

申请日：1999-07-12

申请人： Thomas Boone ,  Joseph Mark Rosamilia

发明人： Thomas Boone ,  Joseph Mark Rosamilia

IPC分类号： H01L213205

CPC分类号： H01L21/28211 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/31111 ,  H01L21/31662

摘要： A method for making a thin dielectric layer is disclosed which is useful in fabricating semiconductor devices, particularly transistors and DRAM cell devices. The method comprises a two-steps, i.e., (i) growing a base layer of dielectric material on a substrate having a thickness in excess of the desired thickness for the layer, and (ii) etching back the base layer to the desired thickness. With these two steps, a thin dielectric layer of less than 20 Å may be provided having substantial uniformity across its surface with a standard deviation in surface contours of less than 0.7 Å.

摘要翻译： 公开了制造薄介电层的方法，其可用于制造半导体器件，特别是晶体管和DRAM单元器件。 该方法包括两步，即（i）在基底上生长具有超过该层所需厚度的厚度的介电材料的基底层，以及（ii）将基底层刻蚀成所需厚度。 通过这两个步骤，可以提供小于20埃的薄介电层，其表面具有基本均匀性，表面轮廓的标准偏差小于0.7。