公开(公告)号：US5343172A

公开(公告)日：1994-08-30

申请号：US997305

申请日：1992-12-23

申请人： Junsi Utsu ,  Seishin Mikami ,  Masao Kodera

发明人： Junsi Utsu ,  Seishin Mikami ,  Masao Kodera

IPC分类号： H03F3/60 ,  H03H11/28 ,  H03H11/30 ,  H03H11/48 ,  H03H7/38 ,  H03F3/16

CPC分类号： H03F1/56 ,  H03H11/30

摘要： Series reactance elements constituted by capacitors are connected to an input side corresponding to the gate electrode of an amplifying FET and an output side corresponding to the drain electrode of the amplifying FET, respectively. Parallel variable reactance circuits are connected to the input and output sides, respectively. Each variable reactance circuit includes a FET, where the source electrodes of the FET are connected to the input and output sides through MIM capacitors, respectively. Additionally, drain electrodes of the FETs are grounded through inductive loads which are constituted by spiral inductors, respectively. The source electrodes of the FETs constituting the variable reactance circuits are grounded through choke coils, respectively. The drain electrodes of the FETs receive control bias voltages through the choke coils, respectively. In this case, each of the resistive components of the spiral inductors is set to have a value which can cancel the negative resistive component of the corresponding FET.

摘要翻译： 由电容器构成的串联电抗元件分别连接到与放大FET的栅电极对应的输入侧和与放大FET的漏电极对应的输出侧。 并联可变电抗电路分别连接到输入和输出侧。 每个可变电抗电路包括FET，其中FET的源电极分别通过MIM电容器连接到输入和输出侧。 此外，FET的漏极分别通过由螺旋电感器构成的感性负载接地。 构成可变电抗电路的FET的源电极分别通过扼流线圈接地。 FET的漏电极分别通过扼流线圈接收控制偏置电压。 在这种情况下，螺旋电感器的电阻分量中的每一个被设定为具有能够抵消对应的FET的负电阻分量的值。