PIXEL CLOCK GENERATOR, DIGITAL TV INCLUDING THE SAME, AND METHOD OF GENERATING PIXEL CLOCK
    1.
    发明申请
    PIXEL CLOCK GENERATOR, DIGITAL TV INCLUDING THE SAME, AND METHOD OF GENERATING PIXEL CLOCK 有权
    像素钟发生器,包括它的数字电视以及产生像素时钟的方法

    公开(公告)号:US20150062432A1

    公开(公告)日:2015-03-05

    申请号:US14444176

    申请日:2014-07-28

    IPC分类号: H04N5/04

    摘要: A pixel clock generator is provided. The pixel clock generator includes a phase-locked-loop (PLL) circuit that generates, from an oscillation signal having a first frequency of tens of MHz, a multi-phase oscillation signal having a second frequency of several GHz; and a frequency/phase adjusting circuit that synchronizes the multi-phase oscillation signal with a horizontal sync signal to generate a first oscillation signal, frequency-divides the first oscillation signal to generate a second oscillation signal, and adjusts a phase of the second oscillation signal to generate the pixel clock.

    摘要翻译: 提供像素时钟发生器。 像素时钟发生器包括:锁相环(PLL)电路,其从具有数十MHz的第一频率的振荡信号产生具有几GHz的第二频率的多相振荡信号; 以及频率/相位调整电路,其将所述多相振荡信号与水平同步信号同步以产生第一振荡信号,对所述第一振荡信号进行频率分频,生成第二振荡信号,并调整所述第二振荡信号的相位 以产生像素时钟。

    Pixel clock generator, digital TV including the same, and method of generating pixel clock
    2.
    发明授权
    Pixel clock generator, digital TV including the same, and method of generating pixel clock 有权
    像素时钟发生器,数字电视包括相同,以及生成像素时钟的方法

    公开(公告)号:US09215352B2

    公开(公告)日:2015-12-15

    申请号:US14444176

    申请日:2014-07-28

    IPC分类号: H04N5/04 G09G5/00 H04N21/43

    摘要: A pixel clock generator is provided. The pixel clock generator includes a phase-locked-loop (PLL) circuit that generates, from an oscillation signal having a first frequency of tens of MHz, a multi-phase oscillation signal having a second frequency of several GHz; and a frequency/phase adjusting circuit that synchronizes the multi-phase oscillation signal with a horizontal sync signal to generate a first oscillation signal, frequency-divides the first oscillation signal to generate a second oscillation signal, and adjusts a phase of the second oscillation signal to generate the pixel clock.

    摘要翻译: 提供像素时钟发生器。 像素时钟发生器包括:锁相环(PLL)电路,其从具有数十MHz的第一频率的振荡信号产生具有几GHz的第二频率的多相振荡信号; 以及频率/相位调整电路,其将所述多相振荡信号与水平同步信号同步以产生第一振荡信号,对所述第一振荡信号进行频率分频,生成第二振荡信号,并调整所述第二振荡信号的相位 以产生像素时钟。