Method and apparatus for automated debug and optimization of in-circuit tests
    2.
    发明申请
    Method and apparatus for automated debug and optimization of in-circuit tests 失效
    用于自动调试和优化在线测试的方法和装置

    公开(公告)号:US20050251715A1

    公开(公告)日:2005-11-10

    申请号:US10839955

    申请日:2004-05-05

    CPC分类号: G01R31/31835 G06F11/2257

    摘要: A method and apparatus for automatically debugging and optimizing an in-circuit test that is used to test a device under test on an automated tester is presented. The novel test debug and optimization technique extracts expert knowledge contained in a knowledge framework and automates the formulation of a valid stable, and preferably optimized, test for execution on an integrated circuit tester.

    摘要翻译: 提出了一种用于自动调试和优化用于在自动测试仪上测试被测设备的在线测试的方法和装置。 新颖的测试调试和优化技术提取知识框架中包含的专家知识,并自动制定有效稳定且优化的集成电路测试仪执行测试。