公开(公告)号：US20110217816A1

公开(公告)日：2011-09-08

申请号：US13110230

申请日：2011-05-18

Applicant: Keita MATSUDA

Inventor： Keita MATSUDA

IPC: H01L21/335

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/475

Abstract: A field effect transistor includes: a nitride semiconductor layer having a channel layer; a gate electrode including a Schottky electrode that contacts the nitride semiconductor layer and includes a gallium doped zinc oxide(GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer.

Abstract translation: 场效应晶体管包括：具有沟道层的氮化物半导体层; 包括与所述氮化物半导体层接触并包含在惰性气体气氛中退火的掺镓的氧化锌（GZO）层的肖特基电极的栅电极; 以及与沟道层连接的欧姆电极。

公开(公告)号：US20090026498A1

公开(公告)日：2009-01-29

申请号：US12179896

申请日：2008-07-25

Applicant: Keita MATSUDA

Inventor： Keita MATSUDA

IPC: H01L29/778 ,  H01L21/338

CPC classification number: H01L29/7786 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/475

Abstract: A field effect transistor includes: a nitride semiconductor layer having a channel layer; a gate electrode including a Schottky electrode that contacts the nitride semiconductor layer and includes a gallium doped zinc oxide (GZO) layer annealed in an inactive gas atmosphere; and ohmic electrodes connecting with the channel layer.

Abstract translation: 场效应晶体管包括：具有沟道层的氮化物半导体层; 包括与所述氮化物半导体层接触并包含在惰性气体气氛中退火的掺镓的氧化锌（GZO）层的肖特基电极的栅电极; 以及与沟道层连接的欧姆电极。

公开(公告)号：US20080121934A1

公开(公告)日：2008-05-29

申请号：US11944953

申请日：2007-11-26

Applicant: Keita MATSUDA

Inventor： Keita MATSUDA

IPC: H01L29/778 ,  H01L21/338

CPC classification number: H01L29/2003 ,  H01L29/47 ,  H01L29/66462 ,  H01L29/66848 ,  H01L29/7786 ,  H01L29/812

Abstract: A semiconductor device includes: a nitride semiconductor layer including a channel layer, a Schottky electrode that contacts the nitride semiconductor layer and contains indium, and an ohmic electrode that contacts the channel layer. The nitride semiconductor layer includes a layer that contacts the Schottky electrode and contains AlGaN, InAlGaN or GaN. The Schottky electrode that contains indium includes one of an indium oxide layer and an indium tin oxide layer.

Abstract translation: 半导体器件包括：包括沟道层的氮化物半导体层，与氮化物半导体层接触并包含铟的肖特基电极和与沟道层接触的欧姆电极。 氮化物半导体层包括接触肖特基电极并含有AlGaN，InAlGaN或GaN的层。 包含铟的肖特基电极包括氧化铟层和氧化铟锡层中的一种。

公开(公告)号：US07875538B2

公开(公告)日：2011-01-25

申请号：US11944953

申请日：2007-11-26

Applicant: Keita Matsuda

Inventor： Keita Matsuda

IPC: H01L29/778 ,  H01L21/338

CPC classification number: H01L29/2003 ,  H01L29/47 ,  H01L29/66462 ,  H01L29/66848 ,  H01L29/7786 ,  H01L29/812

Abstract: A semiconductor device includes: a nitride semiconductor layer including a channel layer, a Schottky electrode that contacts the nitride semiconductor layer and contains indium, and an ohmic electrode that contacts the channel layer. The nitride semiconductor layer includes a layer that contacts the Schottky electrode and contains AlGaN, InAlGaN or GaN. The Schottky electrode that contains indium includes one of an indium oxide layer and an indium tin oxide layer.

Abstract translation: 半导体器件包括：包括沟道层的氮化物半导体层，与氮化物半导体层接触并包含铟的肖特基电极和与沟道层接触的欧姆电极。 氮化物半导体层包括接触肖特基电极并含有AlGaN，InAlGaN或GaN的层。 包含铟的肖特基电极包括氧化铟层和氧化铟锡层中的一种。

公开(公告)号：US5945811A

公开(公告)日：1999-08-31

申请号：US7

申请日：1998-01-21

Applicant: Hirokazu Hasegawa ,  Yasutaka Iwao ,  Keita Matsuda ,  Akihide Konno

Inventor： Hirokazu Hasegawa ,  Yasutaka Iwao ,  Keita Matsuda ,  Akihide Konno

IPC: H02J7/00

CPC classification number: H02J7/0021 ,  H02J7/0011 ,  H02J7/0093

Abstract: The present invention relates to a pulse charging method and charging system for use with non-aqueous secondary batteries, employing a pulse charge controlling method all the way from the start to the end of charging. This pulse charging method has an on-duty ratio of pulses in a next specified charge period reduced when an average battery voltage has exceeded a charge control voltage during a specified charge period, has an on-duty ratio of pulses in a next specified charge period increased when the average battery voltage has not exceeded the charge control voltage and has the pulse charging ended when an on-duty ratio of pulses has reached a specified value. The pulse charging system comprises an on-duty ratio reducing means for having an on-duty ratio of pulses reduced, an on-duty ratio increasing means for having an on-duty ratio increased and a means for determining pulse charge ending for having the pulse charging ended when an on-duty ratio of pulses has reached a specified value. Thus, it has become possible to provide a charging system that can be built in a battery pack, is inexpensive, free of heat generation and, in addition, allows the charging time to be reduced.

Abstract translation: PCT No.PCT / JP97 / 01721 Sec。 371日期1998年1月21日 102（e）1998年1月21日PCT PCT 1997年5月21日PCT公布。 出版物WO97 / 44878 日期1997年11月27日本发明涉及一种与非水二次电池一起使用的脉冲充电方法和充电系统，其采用从开始到结束充电的脉冲充电控制方法。 该脉冲充电方法在指定的充电期间当平均电池电压超过充电控制电压时，下一指定充电期间的脉冲的导通占空比降低，具有下一规定充电期间的脉冲占空比 当平均电池电压未超过充电控制电压并且当脉冲的占空比达到指定值时脉冲充电结束时增加。 脉冲充电系统包括一个占空比减小装置，用于使占空比比降低，用于增加占空比的占空比增加装置和用于确定脉冲电荷结束的装置，以使脉冲 当脉冲的占空比达到规定值时，充电结束。 因此，可以提供一种可以内置在电池组中的充电系统，便宜，无需发热，并且还允许减少充电时间。