公开(公告)号：US06925591B2

公开(公告)日：2005-08-02

申请号：US10850901

申请日：2004-05-21

申请人： Chandrashekhar S. Patwardhan ,  James Earl White ,  Richard Brunner ,  Yan Xu ,  Kenneth Griesser

发明人： Chandrashekhar S. Patwardhan ,  James Earl White ,  Richard Brunner ,  Yan Xu ,  Kenneth Griesser

IPC分类号： G06F12/08 ,  G11C29/16 ,  G06F9/32 ,  G06F9/22

CPC分类号： G06F9/3802 ,  G06F12/0802 ,  G11C29/16

摘要： A method and apparatus for providing full accessibility to on-chip instruction cache and microcode ROM are described. A dummy tag and a dummy instruction are written into a cache tag array and an instruction array, respectively, during a test mode. The dummy tag is concatenated with a predetermined set number and a predetermined word address to form a dummy address having a dummy tag field, a set field and a word address field. An instruction fetch is invoked using the dummy address. The instruction cache is accessed with the dummy address, and a cache miss is forced to occur. The dummy tag field of the dummy address is written into the tag array at a row specified by the predetermined set number, and the dummy instruction is written into the instruction array at the same row. Execution of the dummy instruction is suppressed. A read operation is performed in a similar manner, except in that case an instruction cache hit is forced to occur to cause data to be read from the instruction cache. Execution of the data read from the cache is suppressed. Microcode ROM is also read by invoking a dummy instruction fetch. The dummy instruction fetch causes data to be retrieved from a predetermined address in the ROM. Execution of the retrieved data is suppressed.

摘要翻译： 描述了提供片上指令高速缓存和微代码ROM的完全可访问性的方法和装置。 在测试模式期间，虚拟标签和虚拟指令分别写入高速缓存标签阵列和指令阵列。 虚拟标签与预定的设定号码和预定的字地址连接以形成具有虚设标签字段，设置字段和字地址字段的虚拟地址。 使用虚拟地址调用指令提取。 使用虚拟地址访问指令高速缓存，并强制发生高速缓存未命中。 虚拟地址的虚拟标签字段以由预定设定号码指定的行写入标签阵列，并且将虚拟指令写入同一行的指令数组。 虚拟指令的执行被抑制。 以类似的方式执行读取操作，除了在那种情况下强制发生指令高速缓存命中以使得从指令高速缓存读取数据。 从缓存读取的数据的执行被抑制。 微代码ROM也通过调用伪指令获取来读取。 虚拟指令提取导致从ROM中的预定地址检索数据。 检索到的数据的执行被抑制。

公开(公告)号：US6101578A

公开(公告)日：2000-08-08

申请号：US21677

申请日：1998-02-10

申请人： Chandrashekhar S. Patwardhan ,  James Earl White ,  Richard Brunner ,  Yan Xu ,  Kenneth Griesser

发明人： Chandrashekhar S. Patwardhan ,  James Earl White ,  Richard Brunner ,  Yan Xu ,  Kenneth Griesser

IPC分类号： G06F12/08 ,  G11C29/16 ,  G06F12/00 ,  G06F13/00

CPC分类号： G06F9/3802 ,  G06F12/0802 ,  G11C29/16

摘要： A method and apparatus for providing full accessibility to on-chip instruction cache and microcode ROM are described. A dummy tag and a dummy instruction are written into a cache tag array and an instruction array, respectively, during a test mode. The dummy tag is concatenated with a predetermined set number and a predetermined word address to form a dummy address having a dummy tag field, a set field and a word address field. An instruction fetch is invoked using the dummy address. The instruction cache is accessed with the dummy address, and a cache miss is forced to occur. The dummy tag field of the dummy address is written into the tag array at a row specified by the predetermined set number, and the dummy instruction is written into the instruction array at the same row. Execution of the dummy instruction is suppressed. A read operation is performed in a similar manner, except in that case an instruction cache hit is forced to occur to cause data to be read from the instruction cache. Execution of the data read from the cache is suppressed. Microcode ROM is also read by invoking a dummy instruction fetch The dummy instruction fetch causes data to be retrieved from a predetermined address in the ROM. Execution of the retrieved data is suppressed.

摘要翻译： 描述了提供片上指令高速缓存和微代码ROM的完全可访问性的方法和装置。 在测试模式期间，虚拟标签和虚拟指令分别写入高速缓存标签阵列和指令阵列。 虚拟标签与预定的设定号码和预定的字地址连接以形成具有虚设标签字段，设置字段和字地址字段的虚拟地址。 使用虚拟地址调用指令提取。 使用虚拟地址访问指令高速缓存，并强制发生高速缓存未命中。 虚拟地址的虚拟标签字段以由预定设定号码指定的行写入标签阵列，并且将虚拟指令写入同一行的指令数组。 虚拟指令的执行被抑制。 以类似的方式执行读取操作，除了在那种情况下强制发生指令高速缓存命中以使得从指令高速缓存读取数据。 从缓存读取的数据的执行被抑制。 微代码ROM也通过调用伪指令获取来读取。伪指令提取使得从ROM中的预定地址检索数据。 检索到的数据的执行被抑制。