公开(公告)号：US20130106450A1

公开(公告)日：2013-05-02

申请号：US13562314

申请日：2012-07-31

Applicant: Masashi WATANABE ,  Kensuke SOEDA ,  Naoki MATSUMOTO

Inventor： Masashi WATANABE ,  Kensuke SOEDA ,  Naoki MATSUMOTO

IPC: G05F5/00 ,  G01R31/28

CPC classification number: G01R31/31924

Abstract: The response characteristics of an output signal and current consumption are kept constant. A drive circuit for outputting an output signal having a voltage determined by a logic of an input signal includes a constant voltage generating section generating a constant bias voltage, a CML circuit outputting the output signal having the voltage determined by the logic of the input signal, where an amplitude of the output signal is determined by a constant current flowing through the CML circuit and a potential of the output signal is determined by the bias voltage, an adjustment constant current source that allows a constant current to flow out from a bias voltage output end of the constant voltage generating section, and a current setting section that sets in advance the constant current flowing into the adjustment constant current source, according to the constant current flowing through the CML circuit.

Abstract translation: 输出信号和电流消耗的响应特性保持不变。 用于输出具有由输入信号的逻辑确定的电压的输出信号的驱动电路包括产生恒定偏置电压的恒压产生部分，输出具有由输入信号的逻辑确定的电压的输出信号的CML电路， 其中输出信号的幅度由流过CML电路的恒定电流确定，并且输出信号的电位由偏置电压确定，允许恒定电流从偏置电压输出流出的调节恒流源 恒定电压产生部分的端部和根据流过CML电路的恒定电流预先设定流入调节恒流源的恒定电流的电流设定部分。