公开(公告)号：US6143608A

公开(公告)日：2000-11-07

申请号：US283308

申请日：1999-03-31

Applicant: Yue-Song He ,  Masaaki Higashitani ,  Hao Fang ,  Narbeh Derhacobian ,  Bill Cox ,  Kent Chang ,  Kelwin Ko ,  Maria Chow-Chan

Inventor： Yue-Song He ,  Masaaki Higashitani ,  Hao Fang ,  Narbeh Derhacobian ,  Bill Cox ,  Kent Chang ,  Kelwin Ko ,  Maria Chow-Chan

IPC: H01L21/8247 ,  H01L27/105 ,  H01L21/336

CPC classification number: H01L27/11526 ,  H01L27/105 ,  H01L27/11536

Abstract: This invention describes methods for producing gate oxide regions in periphery regions of semiconductor chips, wherein the gate oxide regions have improved electrical properties. The methods involve the deposition of a barrier layer over the periphery of the semiconductor chip to prevent the introduction of contaminating nitrogen atoms into the periphery during a nitridation step in the core region of the semiconductor chip. By preventing the contamination of the gate areas of the periphery, the gate oxide regions so produced have increased breakdown voltages and increased reliability. This invention describes methods for etching the barrier layers used to protect the periphery from tunnel oxide nitridation. Semiconductor devices made with the methods of this invention have longer expected lifetimes and can be manufactured with higher device density.

Abstract translation: 本发明描述了在半导体芯片的周边区域中制造栅极氧化物区域的方法，其中栅极氧化物区域具有改善的电性能。 所述方法包括在半导体芯片的周边上沉积阻挡层，以防止在半导体芯片的芯区域中的氮化步骤期间将杂质氮原子引入周围。 通过防止周围的栅极区域的污染，如此产生的栅极氧化物区域具有增加的击穿电压和增加的可靠性。 本发明描述了用于蚀刻用于保护周边免受隧道氧化物氮化的阻挡层的方法。 用本发明的方法制造的半导体器件具有更长的预期寿命，并且可以以较高的器件密度制造。

公开(公告)号：US20060270142A1

公开(公告)日：2006-11-30

申请号：US11138612

申请日：2005-05-25

Applicant: Kent Chang ,  Jongoh Kim ,  Yider Wu

Inventor： Kent Chang ,  Jongoh Kim ,  Yider Wu

IPC: H01L21/8244

CPC classification number: H01L27/11568 ,  H01L27/105 ,  H01L27/11573

Abstract: A method of fabricating a memory device is described. During the process of forming the memory cell area and the periphery area of a semiconductor device a photoresist layer is formed on the memory cell area before the spacers are formed on the sidewalls of the gates. Therefore, the memory cell area is prevented from being damaged to mitigate the leakage current problem during the process of forming spacers in the periphery circuit area.

Abstract translation: 描述了一种制造存储器件的方法。 在形成存储单元区域和半导体器件的外围区域的过程中，在形成在栅极的侧壁上的间隔物之前，在存储单元区域上形成光致抗蚀剂层。 因此，在外围电路区域中形成间隔物的过程中，防止存储单元区域被损坏以减轻漏电流问题。