公开(公告)号：US07245529B2

公开(公告)日：2007-07-17

申请号：US11092227

申请日：2005-03-28

申请人： Bomy Chen ,  Kevin Gene-Wah Jew

发明人： Bomy Chen ,  Kevin Gene-Wah Jew

IPC分类号： G11C11/34

CPC分类号： G11C27/005 ,  G11C16/10

摘要： An integrated circuit programmable resistor or programmable capacitor has a floating gate memory cell connected either in series or in parallel to a fixed resistor or a fixed capacitor. The resistance or the capacitance of the floating gate memory cell can be changed by the amount of charge stored on the floating gate which affects the resistance or the capacitance of the channel from which the floating gate is spaced apart. A particular application of the programmable resistor/capacitor is used in a system whereby the resistance or the capacitance can be change or fine tuned as a result of either drift caused by time or by operating conditions such as temperature. Thus, the temperature of the substrate in which the floating gate memory cell is fabricated can be monitored and the resistance or the capacitance of the floating gate memory cell changed dynamically.

摘要翻译： 集成电路可编程电阻器或可编程电容器具有与固定电阻器或固定电容器串联或并联连接的浮动栅极存储器单元。 可以通过浮动栅极上存储的电荷量来改变浮动栅极存储单元的电阻或电容，影响浮动栅极间隔开的沟道的电阻或电容。 可编程电阻器/电容器的特定应用在系统中使用，由此由于由时间引起的漂移或诸如温度的操作条件导致的电阻或电容可以改变或微调。 因此，可以监视其中制造浮动栅极存储单元的衬底的温度，并且动态地改变浮动栅极存储单元的电阻或电容。

公开(公告)号：US20090309182A1

公开(公告)日：2009-12-17

申请号：US12140195

申请日：2008-06-16

申请人： Kung-Yen Su ,  Yaw Wen Hu ,  Bomy Chen ,  Kevin Gene-Wah Jew

发明人： Kung-Yen Su ,  Yaw Wen Hu ,  Bomy Chen ,  Kevin Gene-Wah Jew

IPC分类号： H01L23/62

CPC分类号： H01L27/0259

摘要： A first embodiment of an Electrostatic Discharge (ESD) structure for an integrated circuit for protecting the integrated circuit from an ESD signal, has a substrate of a first conductivity type. The substrate has a top surface. A first region of a second conductivity type is near the top surface and receives the ESD signal. A second region of the second conductivity type is in the substrate, separated and spaced apart from the first region in a substantially vertical direction. A third region of the first conductivity type, heavier in concentration than the substrate, is immediately adjacent to and in contact with the second region, substantially beneath the second region. In a second embodiment, a well of a second conductivity type is provided in the substrate of the first conductivity type. The well has a top surface. A first region of the second conductivity type is near the top surface. A second region of the second conductivity type is in the well, substantially along the bottom of the well. A third region of the first conductivity type, is immediately adjacent to and in contact with the second region, substantially beneath the second region. A fourth region of the first conductivity type is in the well, along the top surface thereof, and spaced apart from the first region. The first region and the fourth region receive the ESD signal.

摘要翻译： 用于保护集成电路免受ESD信号的集成电路的静电放电（ESD）结构的第一实施例具有第一导电类型的衬底。 衬底具有顶表面。 第二导电类型的第一区域靠近顶表面并接收ESD信号。 第二导电类型的第二区域在基板中，在基本上垂直的方向上与第一区域分离并间隔开。 第一导电类型的第三区域，其浓度比衬底更重，与第二区域紧邻并与第二区域接触，基本上在第二区域下方。 在第二实施例中，在第一导电类型的衬底中提供第二导电类型的阱。 井有顶面。 第二导电类型的第一区域靠近顶表面。 第二导电类型的第二区域在井中，基本上沿着井的底部。 第一导电类型的第三区域紧邻第二区域并与第二区域接触，基本上在第二区域下方。 第一导电类型的第四区域沿着其顶表面位于阱中并与第一区域间隔开。 第一区域和第四区域接收ESD信号。